#include #include #include "epoll2.h" #include "die.h" void set_epoll_descriptor(int fd_epoll, int action, int fd_toadd, int events) { int ret; struct epoll_event ev; memset(&ev, 0, sizeof(ev)); ev.events = events; ev.data.fd = fd_toadd; ret = epoll_ctl(fd_epoll, action, fd_toadd, &ev); if (ret < 0) panic("Cannot add socket for epoll!\n"); } int set_epoll_descriptor2(int fd_epoll, int action, int fd_toadd, int events) { struct epoll_event ev; memset(&ev, 0, sizeof(ev)); ev.events = events; ev.data.fd = fd_toadd; return epoll_ctl(fd_epoll, action, fd_toadd, &ev); } t Git repository'/>
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authorXing Zheng <zhengxing@rock-chips.com>2016-08-02 15:19:58 +0800
committerHeiko Stuebner <heiko@sntech.de>2016-08-12 10:04:52 +0200
commit20c389e656a89e2302017bf3f499cb5a31a2a7ba (patch)
tree547dd387e73f0d74eb53cdc7c493f6fc8126aaf9
parenta3f457d9636b3f5ae4fc6502cb0c95f60f5e342b (diff)
clk: rockchip: fix incorrect aclk_emmc source gate bits on rk3399
Dues to incorrect diagram, we need to fix incorrect bits for (c/g)pll_aclk_emmc_src: cpll_aclk_emmc_src --> G6[13] gpll_aclk_emmc_src --> G6[12] Fixes: 115510053e5e ("clk: rockchip: add clock controller for the RK3399") Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat
-rw-r--r--drivers/clk/rockchip/clk-rk3399.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c