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Diffstat (limited to 'lib/misc/ines_vhdl_lib_base_pkg.vhd')
| -rw-r--r-- | lib/misc/ines_vhdl_lib_base_pkg.vhd | 129 |
1 files changed, 129 insertions, 0 deletions
diff --git a/lib/misc/ines_vhdl_lib_base_pkg.vhd b/lib/misc/ines_vhdl_lib_base_pkg.vhd new file mode 100644 index 0000000..e9cd602 --- /dev/null +++ b/lib/misc/ines_vhdl_lib_base_pkg.vhd @@ -0,0 +1,129 @@ +------------------------------------------------------------------ +-- _____ ______ _____ - +-- |_ _| | ____|/ ____| Institute of Embedded Systems - +-- | | _ __ | |__ | (___ Zuercher Hochschule fuer - +-- | | | '_ \| __| \___ \ angewandte Wissenschaften - +-- _| |_| | | | |____ ____) | (University of Applied Sciences) - +-- |_____|_| |_|______|_____/ 8401 Winterthur, Switzerland - +------------------------------------------------------------------ +-- +-- Project : SInet +-- Module : library ines_misc +-- Description : Base package of ines misc library +-- +-- $LastChangedDate: 2007-11-02 14:43:24 +0100 (Fri, 02 Nov 2007) $ +-- $Rev: 403 $ +-- $Author: ffar $ +----------------------------------------------------------------- +-- +-- Change History +-- Date |Name |Modification +------------|----------|----------------------------------------- +-- 02.11.07 | ffar |file created +----------------------------------------------------------------- + + +library ieee; + use ieee.std_logic_1164.all; + + + +package ines_vhdl_lib_base_pkg is + + -- constants + + -- types + subtype std_logic_vector_1 is std_logic_vector(0 downto 0); + type std_logic_array_1 is array(natural range <>) of std_logic_vector_1; + subtype std_logic_vector_2 is std_logic_vector(1 downto 0); + type std_logic_array_2 is array(natural range <>) of std_logic_vector_2; + subtype std_logic_vector_3 is std_logic_vector(2 downto 0); + type std_logic_array_3 is array(natural range <>) of std_logic_vector_3; + subtype std_logic_vector_4 is std_logic_vector(3 downto 0); + type std_logic_array_4 is array(natural range <>) of std_logic_vector_4; + subtype std_logic_vector_5 is std_logic_vector(4 downto 0); + type std_logic_array_5 is array(natural range <>) of std_logic_vector_5; + subtype std_logic_vector_6 is std_logic_vector(5 downto 0); + type std_logic_array_6 is array(natural range <>) of std_logic_vector_6; + subtype std_logic_vector_7 is std_logic_vector(6 downto 0); + type std_logic_array_7 is array(natural range <>) of std_logic_vector_7; + subtype std_logic_vector_8 is std_logic_vector(7 downto 0); + type std_logic_array_8 is array(natural range <>) of std_logic_vector_8; + subtype std_logic_vector_9 is std_logic_vector(8 downto 0); + type std_logic_array_9 is array(natural range <>) of std_logic_vector_9; + subtype std_logic_vector_10 is std_logic_vector(9 downto 0); + type std_logic_array_10 is array(natural range <>) of std_logic_vector_10; + subtype std_logic_vector_11 is std_logic_vector(10 downto 0); + type std_logic_array_11 is array(natural range <>) of std_logic_vector_11; + subtype std_logic_vector_12 is std_logic_vector(11 downto 0); + type std_logic_array_12 is array(natural range <>) of std_logic_vector_12; + subtype std_logic_vector_13 is std_logic_vector(12 downto 0); + type std_logic_array_13 is array(natural range <>) of std_logic_vector_13; + subtype std_logic_vector_14 is std_logic_vector(13 downto 0); + type std_logic_array_14 is array(natural range <>) of std_logic_vector_14; + subtype std_logic_vector_15 is std_logic_vector(14 downto 0); + type std_logic_array_15 is array(natural range <>) of std_logic_vector_15; + subtype std_logic_vector_16 is std_logic_vector(15 downto 0); + type std_logic_array_16 is array(natural range <>) of std_logic_vector_16; + subtype std_logic_vector_17 is std_logic_vector(16 downto 0); + type std_logic_array_17 is array(natural range <>) of std_logic_vector_17; + subtype std_logic_vector_18 is std_logic_vector(17 downto 0); + type std_logic_array_18 is array(natural range <>) of std_logic_vector_18; + subtype std_logic_vector_19 is std_logic_vector(18 downto 0); + type std_logic_array_19 is array(natural range <>) of std_logic_vector_19; + subtype std_logic_vector_20 is std_logic_vector(19 downto 0); + type std_logic_array_20 is array(natural range <>) of std_logic_vector_20; + subtype std_logic_vector_21 is std_logic_vector(20 downto 0); + type std_logic_array_21 is array(natural range <>) of std_logic_vector_21; + subtype std_logic_vector_22 is std_logic_vector(21 downto 0); + type std_logic_array_22 is array(natural range <>) of std_logic_vector_22; + subtype std_logic_vector_23 is std_logic_vector(22 downto 0); + type std_logic_array_23 is array(natural range <>) of std_logic_vector_23; + subtype std_logic_vector_24 is std_logic_vector(23 downto 0); + type std_logic_array_24 is array(natural range <>) of std_logic_vector_24; + subtype std_logic_vector_25 is std_logic_vector(24 downto 0); + type std_logic_array_25 is array(natural range <>) of std_logic_vector_25; + subtype std_logic_vector_26 is std_logic_vector(25 downto 0); + type std_logic_array_26 is array(natural range <>) of std_logic_vector_26; + subtype std_logic_vector_27 is std_logic_vector(26 downto 0); + type std_logic_array_27 is array(natural range <>) of std_logic_vector_27; + subtype std_logic_vector_28 is std_logic_vector(27 downto 0); + type std_logic_array_28 is array(natural range <>) of std_logic_vector_28; + subtype std_logic_vector_29 is std_logic_vector(28 downto 0); + type std_logic_array_29 is array(natural range <>) of std_logic_vector_29; + subtype std_logic_vector_30 is std_logic_vector(29 downto 0); + type std_logic_array_30 is array(natural range <>) of std_logic_vector_30; + subtype std_logic_vector_31 is std_logic_vector(30 downto 0); + type std_logic_array_31 is array(natural range <>) of std_logic_vector_31; + subtype std_logic_vector_32 is std_logic_vector(31 downto 0); + type std_logic_array_32 is array(natural range <>) of std_logic_vector_32; + subtype std_logic_vector_34 is std_logic_vector(33 downto 0); + type std_logic_array_34 is array(natural range <>) of std_logic_vector_34; + subtype std_logic_vector_36 is std_logic_vector(35 downto 0); + type std_logic_array_36 is array(natural range <>) of std_logic_vector_36; + subtype std_logic_vector_64 is std_logic_vector(63 downto 0); + type std_logic_array_64 is array(natural range <>) of std_logic_vector_64; + subtype std_logic_vector_72 is std_logic_vector(71 downto 0); + type std_logic_array_72 is array(natural range <>) of std_logic_vector_72; + + -- functions + function zeros (n:natural) return std_logic_vector; + + +end package ines_vhdl_lib_base_pkg; + + + +package body ines_vhdl_lib_base_pkg is + + function zeros (n:natural) return std_logic_vector is + variable result: std_logic_vector(n-1 downto 0); + begin + for i in 0 to n-1 loop + result(i) := '0'; + end loop; + return result; + end; + +end package body ines_vhdl_lib_base_pkg; + |