diff options
Diffstat (limited to 'quartus/dionysos_nios2mmu.sopc')
| -rw-r--r-- | quartus/dionysos_nios2mmu.sopc | 345 |
1 files changed, 330 insertions, 15 deletions
diff --git a/quartus/dionysos_nios2mmu.sopc b/quartus/dionysos_nios2mmu.sopc index 02ecb7e..802aed8 100644 --- a/quartus/dionysos_nios2mmu.sopc +++ b/quartus/dionysos_nios2mmu.sopc @@ -31,6 +31,14 @@ type = "int"; } } + element triple_speed_ethernet_0.control_port + { + datum baseAddress + { + value = "0"; + type = "long"; + } + } element cpu_0 { datum _sortIndex @@ -44,6 +52,35 @@ type = "String"; } } + element sgdma_rx.csr + { + datum baseAddress + { + value = "1024"; + type = "long"; + } + } + element sgdma_tx.csr + { + datum baseAddress + { + value = "1088"; + type = "long"; + } + } + element descriptor_memory + { + datum _sortIndex + { + value = "13"; + type = "int"; + } + datum megawizard_uipreferences + { + value = "{}"; + type = "String"; + } + } element dionysos_nios2mmu { } @@ -102,19 +139,16 @@ type = "String"; } } - element onchip_memory2_0.s1 + element sdram_0.s1 { - datum baseAddress + datum _lockedAddress { - value = "41951232"; - type = "long"; + value = "0"; + type = "boolean"; } - } - element uart_0.s1 - { datum baseAddress { - value = "41952288"; + value = "16777216"; type = "long"; } } @@ -126,16 +160,19 @@ type = "long"; } } - element sdram_0.s1 + element uart_0.s1 { - datum _lockedAddress + datum baseAddress { - value = "0"; - type = "boolean"; + value = "41952288"; + type = "long"; } + } + element descriptor_memory.s1 + { datum baseAddress { - value = "16777216"; + value = "8192"; type = "long"; } } @@ -147,6 +184,14 @@ type = "long"; } } + element onchip_memory2_0.s1 + { + datum baseAddress + { + value = "41951232"; + type = "long"; + } + } element onchip_memory2_0.s2 { datum baseAddress @@ -168,6 +213,32 @@ type = "String"; } } + element sgdma_rx + { + datum _sortIndex + { + value = "11"; + type = "int"; + } + datum megawizard_uipreferences + { + value = "{}"; + type = "String"; + } + } + element sgdma_tx + { + datum _sortIndex + { + value = "12"; + type = "int"; + } + datum megawizard_uipreferences + { + value = "{}"; + type = "String"; + } + } element timer_0 { datum _sortIndex @@ -194,6 +265,19 @@ type = "String"; } } + element triple_speed_ethernet_0 + { + datum _sortIndex + { + value = "10"; + type = "int"; + } + datum megawizard_uipreferences + { + value = "{}"; + type = "String"; + } + } element uart_0 { datum _sortIndex @@ -214,8 +298,8 @@ <parameter name="hardcopyCompatible" value="false" /> <parameter name="hdlLanguage" value="VHDL" /> <parameter name="projectName">dionysos_nios2mmu.qpf</parameter> - <parameter name="systemHash" value="-23323565077" /> - <parameter name="timeStamp" value="1276249234420" /> + <parameter name="systemHash" value="-64275773308" /> + <parameter name="timeStamp" value="1276765439648" /> <module name="clk_0" kind="clock_source" version="9.1" enabled="1"> <parameter name="clockFrequency" value="50000000" /> <parameter name="clockFrequencyKnown" value="true" /> @@ -417,6 +501,127 @@ <parameter name="useShallowMemBlocks" value="false" /> <parameter name="writable" value="true" /> </module> + <module + name="triple_speed_ethernet_0" + kind="triple_speed_ethernet" + version="9.1" + enabled="1"> + <parameter name="atlanticSinkClockRate" value="0" /> + <parameter name="atlanticSinkClockSource" value="unassigned" /> + <parameter name="atlanticSourceClockRate" value="0" /> + <parameter name="atlanticSourceClockSource" value="unassigned" /> + <parameter name="avalonSlaveClockRate" value="0" /> + <parameter name="avalonSlaveClockSource" value="unassigned" /> + <parameter name="avalonStNeighbours">{TRANSMIT=sgdma_tx, RECEIVE=sgdma_rx}</parameter> + <parameter name="channel_count" value="1" /> + <parameter name="core_variation" value="MAC_ONLY" /> + <parameter name="core_version" value="2305" /> + <parameter name="crc32check16bit" value="0" /> + <parameter name="crc32dwidth" value="8" /> + <parameter name="crc32gendelay" value="6" /> + <parameter name="crc32s1l2_extern" value="false" /> + <parameter name="cust_version" value="0" /> + <parameter name="dataBitsPerSymbol" value="8" /> + <parameter name="dev_version" value="2305" /> + <parameter name="deviceFamily" value="CYCLONEIII" /> + <parameter name="eg_addr" value="10" /> + <parameter name="ena_hash" value="true" /> + <parameter name="enable_alt_reconfig" value="false" /> + <parameter name="enable_clk_sharing" value="false" /> + <parameter name="enable_ena" value="32" /> + <parameter name="enable_fifoless" value="false" /> + <parameter name="enable_gmii_loopback" value="false" /> + <parameter name="enable_hd_logic" value="true" /> + <parameter name="enable_mac_flow_ctrl" value="false" /> + <parameter name="enable_mac_txaddr_set" value="true" /> + <parameter name="enable_mac_vlan" value="false" /> + <parameter name="enable_maclite" value="false" /> + <parameter name="enable_magic_detect" value="true" /> + <parameter name="enable_multi_channel" value="false" /> + <parameter name="enable_pkt_class" value="true" /> + <parameter name="enable_pma" value="false" /> + <parameter name="enable_reg_sharing" value="false" /> + <parameter name="enable_sgmii" value="false" /> + <parameter name="enable_shift16" value="true" /> + <parameter name="enable_sup_addr" value="false" /> + <parameter name="enable_use_internal_fifo" value="true" /> + <parameter name="export_calblkclk" value="false" /> + <parameter name="export_pwrdn" value="false" /> + <parameter name="ext_stat_cnt_ena" value="false" /> + <parameter name="gigeAdvanceMode" value="true" /> + <parameter name="ifGMII" value="MII_GMII" /> + <parameter name="ifPCSuseEmbeddedSerdes" value="false" /> + <parameter name="ing_addr" value="10" /> + <parameter name="insert_ta" value="true" /> + <parameter name="maclite_gige" value="false" /> + <parameter name="max_channels" value="1" /> + <parameter name="mdio_clk_div" value="20" /> + <parameter name="phy_identifier" value="0" /> + <parameter name="ramType" value="AUTO" /> + <parameter name="reset_level" value="1" /> + <parameter name="stat_cnt_ena" value="true" /> + <parameter name="timingAdapterName" value="timingAdapter" /> + <parameter name="toolContext" value="SOPC_BUILDER" /> + <parameter name="transceiver_type" value="GXB" /> + <parameter name="uiHostClockFrequency" value="0" /> + <parameter name="uiMDIOFreq" value="0.0 MHz" /> + <parameter name="useLvds" value="false" /> + <parameter name="useMAC" value="true" /> + <parameter name="useMDIO" value="true" /> + <parameter name="usePCS" value="false" /> + <parameter name="use_sync_reset" value="false" /> + </module> + <module name="sgdma_rx" kind="altera_avalon_sgdma" version="9.1" enabled="1"> + <parameter name="addressWidth" value="32" /> + <parameter name="alwaysDoMaxBurst" value="true" /> + <parameter name="dataTransferFIFODepth" value="2" /> + <parameter name="enableBurstTransfers" value="false" /> + <parameter name="enableDescriptorReadMasterBurst" value="false" /> + <parameter name="enableUnalignedTransfers" value="false" /> + <parameter name="internalFIFODepth" value="2" /> + <parameter name="readBlockDataWidth" value="32" /> + <parameter name="readBurstcountWidth" value="4" /> + <parameter name="sinkErrorWidth" value="6" /> + <parameter name="sourceErrorWidth" value="0" /> + <parameter name="transferMode" value="STREAM_TO_MEMORY" /> + <parameter name="writeBurstcountWidth" value="4" /> + </module> + <module + name="descriptor_memory" + kind="altera_avalon_onchip_memory2" + version="9.1" + enabled="1"> + <parameter name="allowInSystemMemoryContentEditor" value="false" /> + <parameter name="blockType" value="AUTO" /> + <parameter name="dataWidth" value="32" /> + <parameter name="dualPort" value="false" /> + <parameter name="initMemContent" value="true" /> + <parameter name="initializationFileName" value="descriptor_memory" /> + <parameter name="instanceID" value="NONE" /> + <parameter name="memorySize" value="8192" /> + <parameter name="readDuringWriteMode" value="DONT_CARE" /> + <parameter name="simAllowMRAMContentsFile" value="false" /> + <parameter name="slave1Latency" value="1" /> + <parameter name="slave2Latency" value="1" /> + <parameter name="useNonDefaultInitFile" value="false" /> + <parameter name="useShallowMemBlocks" value="false" /> + <parameter name="writable" value="true" /> + </module> + <module name="sgdma_tx" kind="altera_avalon_sgdma" version="9.1" enabled="1"> + <parameter name="addressWidth" value="32" /> + <parameter name="alwaysDoMaxBurst" value="true" /> + <parameter name="dataTransferFIFODepth" value="2" /> + <parameter name="enableBurstTransfers" value="false" /> + <parameter name="enableDescriptorReadMasterBurst" value="false" /> + <parameter name="enableUnalignedTransfers" value="false" /> + <parameter name="internalFIFODepth" value="2" /> + <parameter name="readBlockDataWidth" value="32" /> + <parameter name="readBurstcountWidth" value="4" /> + <parameter name="sinkErrorWidth" value="0" /> + <parameter name="sourceErrorWidth" value="1" /> + <parameter name="transferMode" value="MEMORY_TO_STREAM" /> + <parameter name="writeBurstcountWidth" value="4" /> + </module> <connection kind="clock" version="9.1" start="clk_0.clk" end="cpu_0.clk" /> <connection kind="avalon" @@ -571,4 +776,114 @@ <parameter name="arbitrationPriority" value="1" /> <parameter name="baseAddress" value="0x02802000" /> </connection> + <connection + kind="clock" + version="9.1" + start="clk_0.clk" + end="triple_speed_ethernet_0.receive_clock_connection" /> + <connection + kind="clock" + version="9.1" + start="clk_0.clk" + end="triple_speed_ethernet_0.transmit_clock_connection" /> + <connection + kind="avalon" + version="6.1" + start="cpu_0.data_master" + end="triple_speed_ethernet_0.control_port"> + <parameter name="arbitrationPriority" value="1" /> + <parameter name="baseAddress" value="0x0000" /> + </connection> + <connection + kind="clock" + version="9.1" + start="clk_0.clk" + end="triple_speed_ethernet_0.control_port_clock_connection" /> + <connection kind="clock" version="9.1" start="clk_0.clk" end="sgdma_rx.clk" /> + <connection + kind="avalon" + version="6.1" + start="cpu_0.data_master" + end="sgdma_rx.csr"> + <parameter name="arbitrationPriority" value="1" /> + <parameter name="baseAddress" value="0x0400" /> + </connection> + <connection + kind="interrupt" + version="9.1" + start="cpu_0.d_irq" + end="sgdma_rx.csr_irq"> + <parameter name="irqNumber" value="4" /> + </connection> + <connection + kind="clock" + version="9.1" + start="clk_0.clk" + end="descriptor_memory.clk1" /> + <connection kind="clock" version="9.1" start="clk_0.clk" end="sgdma_tx.clk" /> + <connection + kind="avalon" + version="6.1" + start="cpu_0.data_master" + end="sgdma_tx.csr"> + <parameter name="arbitrationPriority" value="1" /> + <parameter name="baseAddress" value="0x0440" /> + </connection> + <connection + kind="interrupt" + version="9.1" + start="cpu_0.d_irq" + end="sgdma_tx.csr_irq"> + <parameter name="irqNumber" value="5" /> + </connection> + <connection + kind="avalon" + version="6.1" + start="sgdma_rx.descriptor_read" + end="descriptor_memory.s1"> + <parameter name="arbitrationPriority" value="1" /> + <parameter name="baseAddress" value="0x2000" /> + </connection> + <connection + kind="avalon" + version="6.1" + start="sgdma_rx.descriptor_write" + end="descriptor_memory.s1"> + <parameter name="arbitrationPriority" value="1" /> + <parameter name="baseAddress" value="0x2000" /> + </connection> + <connection kind="avalon" version="6.1" start="sgdma_rx.m_write" end="sdram_0.s1"> + <parameter name="arbitrationPriority" value="1" /> + <parameter name="baseAddress" value="0x01000000" /> + </connection> + <connection + kind="avalon_streaming" + version="9.1" + start="triple_speed_ethernet_0.receive" + end="sgdma_rx.in" /> + <connection + kind="avalon_streaming" + version="9.1" + start="sgdma_tx.out" + end="triple_speed_ethernet_0.transmit" /> + <connection kind="avalon" version="6.1" start="sgdma_tx.m_read" end="sdram_0.s1"> + <parameter name="arbitrationPriority" value="1" /> + <parameter name="baseAddress" value="0x01000000" /> + </connection> + <connection + kind="avalon" + version="6.1" + start="sgdma_tx.descriptor_read" + end="descriptor_memory.s1"> + <parameter name="arbitrationPriority" value="1" /> + <parameter name="baseAddress" value="0x2000" /> + </connection> + <connection + kind="avalon" + version="6.1" + start="sgdma_tx.descriptor_write" + end="descriptor_memory.s1"> + <parameter name="arbitrationPriority" value="1" /> + <parameter name="baseAddress" value="0x2000" /> + </connection> </system> |