From 134933c6336efed17dde077df3a9a3233b620bae Mon Sep 17 00:00:00 2001 From: Tobias Klauser Date: Thu, 3 May 2012 08:42:48 +0200 Subject: Add GPIOs etc. --- devicetree/dionysos_nios2mmu.dts | 71 +- dionysos_top.vhd | 60 +- quartus/dionysos_nios2mmu.qsf | 10 +- quartus/dionysos_nios2mmu.sopc | 324 ++- quartus/dionysos_nios2mmu.sopcinfo | 4333 +++++++++++++++++++++++++++++------- 5 files changed, 4002 insertions(+), 796 deletions(-) diff --git a/devicetree/dionysos_nios2mmu.dts b/devicetree/dionysos_nios2mmu.dts index 9549bc1..98b05f4 100644 --- a/devicetree/dionysos_nios2mmu.dts +++ b/devicetree/dionysos_nios2mmu.dts @@ -41,17 +41,17 @@ 0x04802000 0x00000800>; }; sopc@0 { + ranges ; #address-cells = <1>; #size-cells = <1>; device_type = "soc"; compatible = "ALTR,avalon","simple-bus"; - ranges ; bus-frequency = < 50000000 >; //Port instruction_master of cpu_0 - epcs_flash_controller_0: spi@0x5000400 { + epcs_flash_controller_0: flash@0x5000400 { #address-cells = <1>; #size-cells = <0>; - compatible = "ALTR,spi-9.1","ALTR,spi-1.0"; + compatible = "ALTR,epcs_flash-9.1"; reg = < 0x5000400 0x800>; interrupt-parent = < &cpu_0 >; interrupts = < 1 >; @@ -60,7 +60,7 @@ compatible = "m25p80"; reg = <0>; }; - }; //end spi (epcs_flash_controller_0) + }; //end flash (epcs_flash_controller_0) cfi_flash_0: flash@0x4000000 { compatible = "ALTR,cfi_flash-9.1","cfi-flash"; @@ -104,9 +104,8 @@ ALTR,tx-fifo-depth = <1024>; //embeddedsw.CMacro.TRANSMIT_FIFO_DEPTH type NUMBER address-bits = <48>; max-frame-size = <1518>; - local-mac-address = [ 00 15 12 01 42 23 ]; - ALTR,mii-id = <0>; // manually added - ALTR,phy-addr = <2>; // manually added + local-mac-address = [ 00 00 00 00 00 00 ]; + ALTR,mii-id = <0>; }; //end ethernet (tse_mac) watchdog_timer: watchdog@0x4880000 { @@ -124,23 +123,59 @@ }; //end sysid (sysid) ISP1362: isp1362@0x8220000 { - compatible = "nxp,usb-isp1362"; - reg = < 0x8220000 0x4 0x8220004 0x4>; // manually adjusted + compatible = "nxp,isp1362-1.0","nxp,usb-isp1362"; + reg = < 0x8220000 0x04 0x8220004 0x04 0x8220020 0x04 0x8220024 0x04>; interrupt-parent = < &cpu_0 >; - interrupts = < 7 8 >; - nxp,sel15Kres; -// nxp,clknotstop; -// nxp,oc_enable; -// nxp,int_act_high; -// nxp,int_edge_triggered; -// nxp,remote_wakeup_connected; - nxp,no_power_switching; -// nxp,power_switching_mode; + interrupts = < 8 7 >; }; //end isp1362 (ISP1362) + pio_out: gpio@0x8240000 { + compatible = "ALTR,pio-9.1","ALTR,pio-1.0"; + reg = < 0x8240000 0x20>; + width = <2>; //width type NUMBER + resetvalue = <0>; //resetValue type NUMBER + #gpio-cells = <2>; + gpio-controller; + }; //end gpio (pio_out) + + pio_in: gpio@0x8240020 { + compatible = "ALTR,pio-9.1","ALTR,pio-1.0"; + reg = < 0x8240020 0x10>; + interrupt-parent = < &cpu_0 >; + interrupts = < 9 >; + width = <2>; //width type NUMBER + resetvalue = <0>; //resetValue type NUMBER + #gpio-cells = <2>; + gpio-controller; + }; //end gpio (pio_in) + + pio_leds: gpio@0x4400020 { + compatible = "ALTR,pio-9.1","ALTR,pio-1.0"; + reg = < 0x4400020 0x20>; + width = <16>; //width type NUMBER + resetvalue = <0>; //resetValue type NUMBER + #gpio-cells = <2>; + gpio-controller; + }; //end gpio (pio_leds) + + leds { + compatible = "gpio-leds"; + heartbeat { + label = "heartbeat"; + gpios = <&pio_leds 6 0>; + linux,default-trigger = "heartbeat"; + }; + blinky { + label = "blinky"; + gpios = <&pio_leds 5 0>; + linux,default-trigger = "timer"; + }; + }; + //Port tightly_coupled_data_master_0 of cpu_0 }; //sopc chosen { bootargs = "debug console=ttyAL0,115200"; + //bootargs = "debug kgdboc=ttyAL0,115200 kgdbwait console=ttyJ0,115200"; }; }; diff --git a/dionysos_top.vhd b/dionysos_top.vhd index 88f8e1f..19dd923 100644 --- a/dionysos_top.vhd +++ b/dionysos_top.vhd @@ -208,19 +208,20 @@ entity dionysos_top is --! \anchor mdio_grp et_phy2_mdc_o : out std_logic; --! Dual eth phy1, phy2 Management clock et_phy2_mdio_io : inout std_logic; --! Dual eth phy1, phy2 data - rst_et_phy2_n_o : out std_logic --! Ethernet phy reset + rst_et_phy2_n_o : out std_logic; --! Ethernet phy reset --@} + gpio_o : out std_logic_vector(1 downto 0); + gpio_i : in std_logic_vector(1 downto 0) ); end dionysos_top; architecture rtl of dionysos_top is - --! FPGA main clock frequency (50MHz) - constant C_FPGA_FREQ : integer := 50000000; - --! front pannel LEDs - signal leds : std_logic_vector(15 downto 0); + signal leds_front : std_logic_vector(13 downto 0); + --! board LEDs + signal leds_board : std_logic_vector(3 downto 0); --! @name SDRAM Data --@{ @@ -319,7 +320,9 @@ architecture rtl of dionysos_top is signal mac_mdio_en_n : std_logic; --@} - begin + signal gpio_sync_in : std_logic_vector(gpio_i'range); + +begin --! @name Components --@{ @@ -376,10 +379,43 @@ architecture rtl of dionysos_top is reset_n_o => fpga_reset_n_ff_100 -- reset 100 clocks delayed ); - gen_led_g_o <= (others => '1'); - gen_led_r_o <= (others => '1'); + -- + -- GPIO Input synchronization + -- + gpio_sync_gen : for i in gpio_i'range generate + gpio_in_sync : entity work.input_sync + generic map( + G_INIT_VALUE => '0' + ) + port map( + clk_i => pll_clk_50, + reset_n_i => reset_n, + async_signal_i => gpio_i(i), + sync_signal_o => gpio_sync_in(i) + ); + end generate gpio_sync_gen; + + -- + -- Synchronize DIP switches + -- + sw_syncer : entity ines_misc.buf_sync + generic map( + G_NUM_BUF => sw_sync'length + ) + port map( + clk_i => pll_clk_50, + reset_n_i => reset_n, + inp_i => switch_i(sw_sync'range), + outp_o => sw_sync + ); + + -- + -- LEDs + -- - gp_led_o <= (others => '1'); + gen_led_g_o <= not leds_front(6 downto 0); + gen_led_r_o <= not leds_front(13 downto 7); + gp_led_o <= not leds_board; -- NIOSII CPU flash_reset_n_o <= '1'; @@ -472,8 +508,12 @@ architecture rtl of dionysos_top is OTG_RST_N_from_the_ISP1362 => otg_reset_n_o, OTG_WR_N_from_the_ISP1362 => otg_we_n_o, OTG_INT0_to_the_ISP1362 => otg_int0_i, - OTG_INT1_to_the_ISP1362 => otg_int1_i + OTG_INT1_to_the_ISP1362 => otg_int1_i, + -- GPIO + out_port_from_the_pio_leds_front => leds_front, + out_port_from_the_pio_leds_board => leds_board, + in_port_to_the_pio_dipswitch => sw_sync ); --------------------------------------------------------------------- diff --git a/quartus/dionysos_nios2mmu.qsf b/quartus/dionysos_nios2mmu.qsf index 4e44174..23cdf35 100644 --- a/quartus/dionysos_nios2mmu.qsf +++ b/quartus/dionysos_nios2mmu.qsf @@ -434,6 +434,10 @@ set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region" + + +set_global_assignment -name VHDL_FILE ../lib/misc/components/buf_sync.vhd +set_global_assignment -name VHDL_FILE ../lib/misc/components/input_sync.vhd set_global_assignment -name VHDL_FILE ../lib/ethernet/components/rmii_phy_to_mii_mac.vhd set_global_assignment -name VHDL_FILE ../lib/misc/components/bibuf_async.vhd set_global_assignment -name VHDL_FILE ../lib/misc/ines_vhdl_lib_base_pkg.vhd @@ -444,9 +448,9 @@ set_global_assignment -name VHDL_FILE ../lib/ethernet/components/rmii_in_out.vhd set_global_assignment -name QIP_FILE ../lib/altera/sinet_pll.qip set_global_assignment -name VHDL_FILE ../lib/misc/components/reset_sync.vhd set_global_assignment -name VHDL_FILE ../dionysos_top.vhd -set_global_assignment -name QIP_FILE dionysos_nios2mmu.qip set_global_assignment -name VHDL_FILE dionysos_nios2mmu.vhd set_global_assignment -name SDC_FILE dionysos_nios2mmu.sdc - - +set_global_assignment -name QIP_FILE dionysos_nios2mmu.qip +set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON +set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL ON set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/quartus/dionysos_nios2mmu.sopc b/quartus/dionysos_nios2mmu.sopc index 9d5005e..e99297b 100644 --- a/quartus/dionysos_nios2mmu.sopc +++ b/quartus/dionysos_nios2mmu.sopc @@ -9,6 +9,11 @@ value = "16"; type = "int"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element jtag_uart_0.avalon_jtag_slave { @@ -61,6 +66,11 @@ value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos_nios2mmu/quartus}"; type = "String"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element clk_0 { @@ -109,6 +119,30 @@ type = "String"; } } + element cpu_0_converter + { + datum _sortIndex + { + value = "18"; + type = "int"; + } + } + element cpu_0_ffs_inst + { + datum _sortIndex + { + value = "19"; + type = "int"; + } + } + element cpu_0_fls_inst + { + datum _sortIndex + { + value = "20"; + type = "int"; + } + } element sgdma_tx.csr { datum _lockedAddress @@ -147,6 +181,11 @@ value = "{}"; type = "String"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element dionysos_nios2mmu { @@ -176,6 +215,11 @@ value = "{}"; type = "String"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element cpu_0.jtag_debug_module { @@ -202,12 +246,17 @@ value = "{}"; type = "String"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element onchip_memory2_0 { datum _sortIndex { - value = "3"; + value = "2"; type = "int"; } datum megawizard_uipreferences @@ -215,8 +264,52 @@ value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos_nios2mmu/quartus}"; type = "String"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } - element onchip_memory2_0.s1 + element pio_dipswitch + { + datum _sortIndex + { + value = "22"; + type = "int"; + } + datum megawizard_uipreferences + { + value = "{}"; + type = "String"; + } + } + element pio_leds_board + { + datum _sortIndex + { + value = "21"; + type = "int"; + } + datum megawizard_uipreferences + { + value = "{}"; + type = "String"; + } + } + element pio_leds_front + { + datum _sortIndex + { + value = "17"; + type = "int"; + } + datum megawizard_uipreferences + { + value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos_nios2mmu/quartus}"; + type = "String"; + } + } + element pio_leds_front.s1 { datum _lockedAddress { @@ -225,7 +318,20 @@ } datum baseAddress { - value = "75505664"; + value = "71303200"; + type = "long"; + } + } + element descriptor_memory.s1 + { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } + datum baseAddress + { + value = "75759616"; type = "long"; } } @@ -242,7 +348,7 @@ type = "long"; } } - element timer_0.s1 + element pio_dipswitch.s1 { datum _lockedAddress { @@ -251,7 +357,20 @@ } datum baseAddress { - value = "71303168"; + value = "71303264"; + type = "long"; + } + } + element pio_leds_board.s1 + { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } + datum baseAddress + { + value = "71303232"; type = "long"; } } @@ -281,7 +400,7 @@ type = "long"; } } - element descriptor_memory.s1 + element cfi_flash_0.s1 { datum _lockedAddress { @@ -290,11 +409,11 @@ } datum baseAddress { - value = "75759616"; + value = "67108864"; type = "long"; } } - element cfi_flash_0.s1 + element onchip_memory2_0.s1 { datum _lockedAddress { @@ -303,7 +422,20 @@ } datum baseAddress { - value = "67108864"; + value = "75505664"; + type = "long"; + } + } + element timer_0.s1 + { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } + datum baseAddress + { + value = "71303168"; type = "long"; } } @@ -324,7 +456,7 @@ { datum _sortIndex { - value = "4"; + value = "3"; type = "int"; } datum megawizard_uipreferences @@ -332,6 +464,11 @@ value = "{}"; type = "String"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element sgdma_rx { @@ -345,6 +482,11 @@ value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos_nios2mmu/quartus}"; type = "String"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element sgdma_tx { @@ -358,12 +500,17 @@ value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos_nios2mmu/quartus}"; type = "String"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element sysid { datum _sortIndex { - value = "2"; + value = "4"; type = "int"; } datum megawizard_uipreferences @@ -371,6 +518,11 @@ value = "{}"; type = "String"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element timer_0 { @@ -384,6 +536,11 @@ value = "{}"; type = "String"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element tri_state_bridge_0 { @@ -397,6 +554,11 @@ value = "{}"; type = "String"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element tse_mac { @@ -410,6 +572,11 @@ value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos_nios2mmu/quartus}"; type = "String"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element uart_0 { @@ -423,6 +590,11 @@ value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos_nios2mmu/quartus}"; type = "String"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } element watchdog_timer { @@ -436,6 +608,11 @@ value = "{}"; type = "String"; } + datum sopceditor_expanded + { + value = "0"; + type = "boolean"; + } } } ]]> @@ -444,8 +621,8 @@ dionysos_nios2mmu.qpf - - + + @@ -457,7 +634,7 @@ - + @@ -781,6 +958,64 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/quartus/dionysos_nios2mmu.sopcinfo b/quartus/dionysos_nios2mmu.sopcinfo index b036bb4..bd6d973 100644 --- a/quartus/dionysos_nios2mmu.sopcinfo +++ b/quartus/dionysos_nios2mmu.sopcinfo @@ -4,7 +4,7 @@ kind="com_altera_sopcmodel_ensemble_Ensemble" version="9.1"> - + com.altera.entityinterfaces.moduleext.IDeviceFamily$EDeviceFamily @@ -48,7 +48,7 @@ long - -88262254885 + -101819761844 false true true @@ -56,7 +56,7 @@ long - 1308843850996 + 1331193876724 false true true @@ -293,6 +293,24 @@ parameters are a RESULT of the module parameters. --> clock_reset ISP1362.clock_reset + + false + pio_leds_front + clk + pio_leds_front.clk + + + false + pio_leds_board + clk + pio_leds_board.clk + + + false + pio_dipswitch + clk + pio_dipswitch.clk + embeddedsw.CMacro.HAS_ILLEGAL_MEMORY_ACCESS_EXCEPTION + + embeddedsw.CMacro.HAS_DIVISION_ERROR_EXCEPTION + + embeddedsw.CMacro.HAS_EXTRA_EXCEPTION_INFO @@ -611,7 +633,7 @@ the requested settings for a module instance. --> boolean - false + true false true true @@ -2299,6 +2321,30 @@ parameters are a RESULT of the module parameters. --> 136445984 4 + + false + pio_leds_front + s1 + pio_leds_front.s1 + 71303200 + 32 + + + false + pio_leds_board + s1 + pio_leds_board.s1 + 71303232 + 32 + + + false + pio_dipswitch + s1 + pio_dipswitch.s1 + 71303264 + 16 + ISP1362.interrupt_sender_0 7 + + false + pio_dipswitch + irq + pio_dipswitch.irq + 9 + boolean - false + true false true false @@ -3250,6 +3303,30 @@ parameters are a RESULT of the module parameters. --> 1 writerc + + false + cpu_0_converter + s1 + cpu_0_converter.s1 + 0 + converter + + + false + cpu_0_ffs_inst + nios_custom_instruction_slave_0 + cpu_0_ffs_inst.nios_custom_instruction_slave_0 + 1 + ffs_inst + + + false + cpu_0_fls_inst + nios_custom_instruction_slave_0 + cpu_0_fls_inst.nios_custom_instruction_slave_0 + 2 + fls_inst + the requested settings for a module instance. --> embeddedsw.CMacro.ID - 215425358u + 888030435u embeddedsw.CMacro.TIMESTAMP - 1308843851u + 1331193877u long - 215425358 + 888030435 true true true @@ -15018,7 +15095,7 @@ the requested settings for a module instance. --> long - 1308843851 + 1331193877 true true true @@ -16429,206 +16506,152 @@ parameters are a RESULT of the module parameters. --> - - - java.lang.String - UNKNOWN - false - true - true - true - - + + + + embeddedsw.CMacro.DO_TEST_BENCH_WIRING + 0 + + + embeddedsw.CMacro.DRIVEN_SIM_VALUE + 0x0 + + + embeddedsw.CMacro.HAS_TRI + 0 + + + embeddedsw.CMacro.HAS_OUT + 1 + + + embeddedsw.CMacro.HAS_IN + 0 + + + embeddedsw.CMacro.CAPTURE + 0 + + + embeddedsw.CMacro.BIT_CLEARING_EDGE_REGISTER + 0 + + + embeddedsw.CMacro.BIT_MODIFYING_OUTPUT_REGISTER + 1 + + + embeddedsw.CMacro.DATA_WIDTH + 16 + + + embeddedsw.CMacro.RESET_VALUE + 0x0 + + + embeddedsw.CMacro.EDGE_TYPE + "NONE" + + + embeddedsw.CMacro.IRQ_TYPE + "NONE" + + + embeddedsw.CMacro.FREQ + 50000000u + + boolean false false - true - true - true - - clk_0 - clk - cpu_0 - clk - - - - int - 1 - false - true - true - true - - - long - 0x04800000 - false - true + false true true - - java.lang.String - UNKNOWN + + boolean + true false true true true - + boolean false false - true - true - true - - cpu_0 - instruction_master - cpu_0 - jtag_debug_module - - - - int - 1 - false - true + false true true - + long - 0x04800000 - false - true - true - true - - - java.lang.String - UNKNOWN + 50000000 false true true true - - boolean - false + + com.altera.sopcmodel.components.avalon.AlteraAvalonPIO.AlteraAvalonPIO$Direction + Output false true true true - cpu_0 - data_master - cpu_0 - jtag_debug_module - - - - java.lang.String - UNKNOWN + + com.altera.sopcmodel.components.avalon.AlteraAvalonPIO.AlteraAvalonPIO$EdgeType + RISING false - true + false true true - + boolean false false - true + false true true - clk_0 - clk - sdram_0 - clk - - - - int - 1 + + com.altera.sopcmodel.components.avalon.AlteraAvalonPIO.AlteraAvalonPIO$IrqType + LEVEL false - true + false true true - + long - 0x0000 - false - true - true - true - - - java.lang.String - UNKNOWN + 0 false true true true - + boolean false false - true + false true true - cpu_0 - instruction_master - sdram_0 - s1 - - - - int - 1 + + long + 0 false - true + false true true - - long - 0x0000 + + int + 16 false true true @@ -16650,20 +16673,2657 @@ parameters are a RESULT of the module parameters. --> true true - cpu_0 - data_master - sdram_0 - s1 - - - - java.lang.String - UNKNOWN + + + + java.lang.Long + 50000000 + true + true + false + true + + + java.lang.Boolean + true + true + true + false + true + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clock + false + + clk + Input + 1 + clk + + + reset_n + Input + 1 + reset_n + + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 0 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 0 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + NATIVE + false + true + true + true + + + int + 0 + false + true + false + true + + + long + 8 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk + false + true + false + true + + + java.lang.String + + false + true + false + true + + + int + 8 + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + true + false + true + false + true + + + long + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + int + 1 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + address + Input + 3 + address + + + write_n + Input + 1 + write_n + + + writedata + Input + 16 + writedata + + + chipselect + Input + 1 + chipselect + + + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + conduit + false + + out_port + Output + 16 + export + + + + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + java.lang.String + + true + true + false + true + + + int + 0 + true + true + false + true + + + int + 1 + false + true + true + true + + + com.altera.sopcmodel.custominstruction.CustomInstruction$ClockCycleType + COMBINATORIAL + true + true + false + true + + + int + 0 + true + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 1 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + nios_custom_instruction + false + + dataa + Input + 32 + dataa + + + datab + Input + 32 + datab + + + result + Output + 32 + result + + + + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + java.lang.String + + true + true + false + true + + + int + 0 + true + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.custominstruction.CustomInstruction$ClockCycleType + COMBINATORIAL + true + true + false + true + + + int + 0 + true + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 2 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + nios_custom_instruction + false + + dataa + Input + 32 + dataa + + + result + Output + 32 + result + + + + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + java.lang.String + + true + true + false + true + + + int + 0 + true + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.custominstruction.CustomInstruction$ClockCycleType + COMBINATORIAL + true + true + false + true + + + int + 0 + true + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 2 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + nios_custom_instruction + false + + dataa + Input + 32 + dataa + + + result + Output + 32 + result + + + + + + + embeddedsw.CMacro.DO_TEST_BENCH_WIRING + 0 + + + embeddedsw.CMacro.DRIVEN_SIM_VALUE + 0x0 + + + embeddedsw.CMacro.HAS_TRI + 0 + + + embeddedsw.CMacro.HAS_OUT + 1 + + + embeddedsw.CMacro.HAS_IN + 0 + + + embeddedsw.CMacro.CAPTURE + 0 + + + embeddedsw.CMacro.BIT_CLEARING_EDGE_REGISTER + 0 + + + embeddedsw.CMacro.BIT_MODIFYING_OUTPUT_REGISTER + 1 + + + embeddedsw.CMacro.DATA_WIDTH + 4 + + + embeddedsw.CMacro.RESET_VALUE + 0x0 + + + embeddedsw.CMacro.EDGE_TYPE + "NONE" + + + embeddedsw.CMacro.IRQ_TYPE + "NONE" + + + embeddedsw.CMacro.FREQ + 50000000u + + + boolean + false + false + false + true + true + + + boolean + true + false + true + true + true + + + boolean + false + false + false + true + true + + + long + 50000000 + false + true + true + true + + + com.altera.sopcmodel.components.avalon.AlteraAvalonPIO.AlteraAvalonPIO$Direction + Output + false + true + true + true + + + com.altera.sopcmodel.components.avalon.AlteraAvalonPIO.AlteraAvalonPIO$EdgeType + RISING + false + false + true + true + + + boolean + false + false + false + true + true + + + com.altera.sopcmodel.components.avalon.AlteraAvalonPIO.AlteraAvalonPIO$IrqType + LEVEL + false + false + true + true + + + long + 0 + false + true + true + true + + + boolean + false + false + false + true + true + + + long + 0 + false + false + true + true + + + int + 4 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + java.lang.Long + 50000000 + true + true + false + true + + + java.lang.Boolean + true + true + true + false + true + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clock + false + + clk + Input + 1 + clk + + + reset_n + Input + 1 + reset_n + + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 0 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 0 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + NATIVE + false + true + true + true + + + int + 0 + false + true + false + true + + + long + 8 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk + false + true + false + true + + + java.lang.String + + false + true + false + true + + + int + 8 + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + true + false + true + false + true + + + long + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + int + 1 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + address + Input + 3 + address + + + write_n + Input + 1 + write_n + + + writedata + Input + 4 + writedata + + + chipselect + Input + 1 + chipselect + + + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + conduit + false + + out_port + Output + 4 + export + + + + + + + embeddedsw.CMacro.DO_TEST_BENCH_WIRING + 0 + + + embeddedsw.CMacro.DRIVEN_SIM_VALUE + 0x0 + + + embeddedsw.CMacro.HAS_TRI + 0 + + + embeddedsw.CMacro.HAS_OUT + 0 + + + embeddedsw.CMacro.HAS_IN + 1 + + + embeddedsw.CMacro.CAPTURE + 1 + + + embeddedsw.CMacro.BIT_CLEARING_EDGE_REGISTER + 1 + + + embeddedsw.CMacro.BIT_MODIFYING_OUTPUT_REGISTER + 0 + + + embeddedsw.CMacro.DATA_WIDTH + 4 + + + embeddedsw.CMacro.RESET_VALUE + 0x0 + + + embeddedsw.CMacro.EDGE_TYPE + "RISING" + + + embeddedsw.CMacro.IRQ_TYPE + "EDGE" + + + embeddedsw.CMacro.FREQ + 50000000u + + + boolean + true + false + true + true + true + + + boolean + false + false + false + true + true + + + boolean + true + false + true + true + true + + + long + 50000000 + false + true + true + true + + + com.altera.sopcmodel.components.avalon.AlteraAvalonPIO.AlteraAvalonPIO$Direction + Input + false + true + true + true + + + com.altera.sopcmodel.components.avalon.AlteraAvalonPIO.AlteraAvalonPIO$EdgeType + RISING + false + true + true + true + + + boolean + true + false + true + true + true + + + com.altera.sopcmodel.components.avalon.AlteraAvalonPIO.AlteraAvalonPIO$IrqType + EDGE + false + true + true + true + + + long + 0 + false + false + true + true + + + boolean + false + false + true + true + true + + + long + 0 + false + false + true + true + + + int + 4 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + + + + java.lang.Long + 50000000 + true + true + false + true + + + java.lang.Boolean + true + true + true + false + true + + + boolean + false + false + true + false + true + + + java.lang.String + + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clock + false + + clk + Input + 1 + clk + + + reset_n + Input + 1 + reset_n + + + + + + embeddedsw.configuration.isFlash + 0 + + + embeddedsw.configuration.isMemoryDevice + 0 + + + embeddedsw.configuration.isNonVolatileStorage + 0 + + + embeddedsw.configuration.isPrintableDevice + 0 + + + com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment + NATIVE + false + true + true + true + + + int + 0 + false + true + false + true + + + long + 4 + true + true + false + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + false + false + true + false + true + + + java.lang.String + clk + false + true + false + true + + + java.lang.String + + false + true + false + true + + + int + 8 + false + true + false + true + + + com.altera.entityinterfaces.IConnectionPoint + + false + true + false + true + + + boolean + false + false + true + true + true + + + com.altera.sopcmodel.avalon.EAddrBurstUnits + WORDS + false + true + false + true + + + boolean + true + false + true + false + true + + + long + 0 + false + true + true + true + + + int + 0 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + boolean + false + false + true + true + true + + + int + 0 + false + false + true + true + + + int + 1 + false + true + false + true + + + boolean + false + false + true + true + true + + + int + 0 + false + true + true + true + + + int + 1 + false + true + false + true + + + int + 1 + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + true + true + + + com.altera.sopcmodel.avalon.TimingUnits + Cycles + false + true + true + true + + + boolean + false + false + true + false + true + + + boolean + false + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + false + true + + + int + 0 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + avalon + false + + address + Input + 2 + address + + + write_n + Input + 1 + write_n + + + writedata + Input + 4 + writedata + + + chipselect + Input + 1 + chipselect + + + readdata + Output + 4 + readdata + + + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + conduit + false + + in_port + Input + 4 + export + + + + + + com.altera.entityinterfaces.IConnectionPoint + pio_dipswitch.s1 + false + true + true + true + + + java.lang.String + + false + true + false + true + + + com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme + NONE + false + true + false + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + interrupt + false + + irq + Output + 1 + irq + + + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk_0 + clk + cpu_0 + clk + + + + int + 1 + false + true + true + true + + + long + 0x04800000 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu_0 + instruction_master + cpu_0 + jtag_debug_module + + + + int + 1 + false + true + true + true + + + long + 0x04800000 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu_0 + data_master + cpu_0 + jtag_debug_module + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk_0 + clk + sdram_0 + clk + + + + int + 1 + false + true + true + true + + + long + 0x0000 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu_0 + instruction_master + sdram_0 + s1 + + + + int + 1 + false + true + true + true + + + long + 0x0000 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu_0 + data_master + sdram_0 + s1 + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk_0 + clk + tri_state_bridge_0 + clk + + + + int + 1 + false + true + true + true + + + long + 0x0000 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu_0 + instruction_master + tri_state_bridge_0 + avalon_slave + + + + int + 1 + false + true + true + true + + + long + 0x0000 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu_0 + data_master + tri_state_bridge_0 + avalon_slave + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk_0 + clk + cfi_flash_0 + clk + + + + int + 1 + false + true + true + true + + + long + 0x04000000 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + tri_state_bridge_0 + tristate_master + cfi_flash_0 + s1 + + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk_0 + clk + epcs_flash_controller_0 + clk + + + + int + 1 + false + true + true + true + + + long + 0x05000000 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu_0 + instruction_master + epcs_flash_controller_0 + epcs_control_port + + + + int + 1 + false + true + true + true + + + long + 0x05000000 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu_0 + data_master + epcs_flash_controller_0 + epcs_control_port + + + + int + 1 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu_0 + d_irq + epcs_flash_controller_0 + irq + + + + java.lang.String + UNKNOWN false true true @@ -16679,15 +19339,15 @@ parameters are a RESULT of the module parameters. --> clk_0 clk - tri_state_bridge_0 + timer_0 clk + start="cpu_0.data_master" + end="timer_0.s1"> int 1 @@ -16698,7 +19358,7 @@ parameters are a RESULT of the module parameters. --> long - 0x0000 + 0x04400000 false true true @@ -16721,27 +19381,19 @@ parameters are a RESULT of the module parameters. --> true cpu_0 - instruction_master - tri_state_bridge_0 - avalon_slave + data_master + timer_0 + s1 - + name="cpu_0.d_irq/timer_0.irq" + kind="interrupt" + version="9.1" + start="cpu_0.d_irq" + end="timer_0.irq"> + int - 1 - false - true - true - true - - - long - 0x0000 + 0 false true true @@ -16764,16 +19416,16 @@ parameters are a RESULT of the module parameters. --> true cpu_0 - data_master - tri_state_bridge_0 - avalon_slave + d_irq + timer_0 + irq + end="uart_0.clk"> java.lang.String UNKNOWN @@ -16792,15 +19444,15 @@ parameters are a RESULT of the module parameters. --> clk_0 clk - cfi_flash_0 + uart_0 clk + name="cpu_0.data_master/uart_0.s1" + kind="avalon" + version="6.1" + start="cpu_0.data_master" + end="uart_0.s1"> int 1 @@ -16811,7 +19463,7 @@ parameters are a RESULT of the module parameters. --> long - 0x04000000 + 0x06000000 false true true @@ -16833,17 +19485,25 @@ parameters are a RESULT of the module parameters. --> true true - tri_state_bridge_0 - tristate_master - cfi_flash_0 + cpu_0 + data_master + uart_0 s1 + start="cpu_0.d_irq" + end="uart_0.irq"> + + int + 2 + false + true + true + true + java.lang.String UNKNOWN @@ -16860,33 +19520,17 @@ parameters are a RESULT of the module parameters. --> true true - clk_0 - clk - epcs_flash_controller_0 - clk + cpu_0 + d_irq + uart_0 + irq - - int - 1 - false - true - true - true - - - long - 0x05000000 - false - true - true - true - + name="clk_0.clk/jtag_uart_0.clk" + kind="clock" + version="9.1" + start="clk_0.clk" + end="jtag_uart_0.clk"> java.lang.String UNKNOWN @@ -16903,17 +19547,17 @@ parameters are a RESULT of the module parameters. --> true true - cpu_0 - instruction_master - epcs_flash_controller_0 - epcs_control_port + clk_0 + clk + jtag_uart_0 + clk + end="jtag_uart_0.avalon_jtag_slave"> int 1 @@ -16924,7 +19568,7 @@ parameters are a RESULT of the module parameters. --> long - 0x05000000 + 0x07000000 false true true @@ -16948,18 +19592,18 @@ parameters are a RESULT of the module parameters. --> cpu_0 data_master - epcs_flash_controller_0 - epcs_control_port + jtag_uart_0 + avalon_jtag_slave + end="jtag_uart_0.irq"> int - 1 + 3 false true true @@ -16983,15 +19627,15 @@ parameters are a RESULT of the module parameters. --> cpu_0 d_irq - epcs_flash_controller_0 + jtag_uart_0 irq + end="onchip_memory2_0.clk1"> java.lang.String UNKNOWN @@ -17010,15 +19654,42 @@ parameters are a RESULT of the module parameters. --> clk_0 clk - timer_0 - clk + onchip_memory2_0 + clk1 + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + clk_0 + clk + onchip_memory2_0 + clk2 + + + start="cpu_0.tightly_coupled_instruction_master_0" + end="onchip_memory2_0.s1"> int 1 @@ -17029,7 +19700,50 @@ parameters are a RESULT of the module parameters. --> long - 0x04400000 + 0x04802000 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu_0 + tightly_coupled_instruction_master_0 + onchip_memory2_0 + s1 + + + + int + 1 + false + true + true + true + + + long + 0x04802000 false true true @@ -17052,24 +19766,16 @@ parameters are a RESULT of the module parameters. --> true cpu_0 - data_master - timer_0 - s1 + tightly_coupled_data_master_0 + onchip_memory2_0 + s2 - - int - 0 - false - true - true - true - + start="clk_0.clk" + end="tse_mac.receive_clock_connection"> java.lang.String UNKNOWN @@ -17086,17 +19792,17 @@ parameters are a RESULT of the module parameters. --> true true - cpu_0 - d_irq - timer_0 - irq + clk_0 + clk + tse_mac + receive_clock_connection + end="tse_mac.transmit_clock_connection"> java.lang.String UNKNOWN @@ -17115,15 +19821,15 @@ parameters are a RESULT of the module parameters. --> clk_0 clk - uart_0 - clk + tse_mac + transmit_clock_connection + end="tse_mac.control_port"> int 1 @@ -17134,7 +19840,7 @@ parameters are a RESULT of the module parameters. --> long - 0x06000000 + 0x08002400 false true true @@ -17158,23 +19864,15 @@ parameters are a RESULT of the module parameters. --> cpu_0 data_master - uart_0 - s1 + tse_mac + control_port - - int - 2 - false - true - true - true - + start="clk_0.clk" + end="tse_mac.control_port_clock_connection"> java.lang.String UNKNOWN @@ -17191,17 +19889,17 @@ parameters are a RESULT of the module parameters. --> true true - cpu_0 - d_irq - uart_0 - irq + clk_0 + clk + tse_mac + control_port_clock_connection + end="sgdma_rx.clk"> java.lang.String UNKNOWN @@ -17220,15 +19918,15 @@ parameters are a RESULT of the module parameters. --> clk_0 clk - jtag_uart_0 + sgdma_rx clk + end="sgdma_rx.csr"> int 1 @@ -17239,7 +19937,7 @@ parameters are a RESULT of the module parameters. --> long - 0x07000000 + 0x08100000 false true true @@ -17263,18 +19961,18 @@ parameters are a RESULT of the module parameters. --> cpu_0 data_master - jtag_uart_0 - avalon_jtag_slave + sgdma_rx + csr + end="sgdma_rx.csr_irq"> int - 3 + 4 false true true @@ -17298,15 +19996,15 @@ parameters are a RESULT of the module parameters. --> cpu_0 d_irq - jtag_uart_0 - irq + sgdma_rx + csr_irq + end="descriptor_memory.clk1"> java.lang.String UNKNOWN @@ -17325,15 +20023,15 @@ parameters are a RESULT of the module parameters. --> clk_0 clk - onchip_memory2_0 + descriptor_memory clk1 + end="sgdma_tx.clk"> java.lang.String UNKNOWN @@ -17352,15 +20050,15 @@ parameters are a RESULT of the module parameters. --> clk_0 clk - onchip_memory2_0 - clk2 + sgdma_tx + clk + start="cpu_0.data_master" + end="sgdma_tx.csr"> int 1 @@ -17371,7 +20069,7 @@ parameters are a RESULT of the module parameters. --> long - 0x04802000 + 0x08200000 false true true @@ -17394,16 +20092,51 @@ parameters are a RESULT of the module parameters. --> true cpu_0 - tightly_coupled_instruction_master_0 - onchip_memory2_0 - s1 + data_master + sgdma_tx + csr + + int + 5 + false + true + true + true + + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false + false + true + true + true + + cpu_0 + d_irq + sgdma_tx + csr_irq + + + start="sgdma_rx.descriptor_read" + end="descriptor_memory.s1"> int 1 @@ -17414,7 +20147,7 @@ parameters are a RESULT of the module parameters. --> long - 0x04802000 + 0x04840000 false true true @@ -17436,44 +20169,33 @@ parameters are a RESULT of the module parameters. --> true true - cpu_0 - tightly_coupled_data_master_0 - onchip_memory2_0 - s2 + sgdma_rx + descriptor_read + descriptor_memory + s1 - - java.lang.String - UNKNOWN + name="sgdma_rx.descriptor_write/descriptor_memory.s1" + kind="avalon" + version="6.1" + start="sgdma_rx.descriptor_write" + end="descriptor_memory.s1"> + + int + 1 false true true true - - boolean - false + + long + 0x04840000 false true true true - clk_0 - clk - tse_mac - receive_clock_connection - - java.lang.String UNKNOWN @@ -17490,17 +20212,17 @@ parameters are a RESULT of the module parameters. --> true true - clk_0 - clk - tse_mac - transmit_clock_connection + sgdma_rx + descriptor_write + descriptor_memory + s1 + start="sgdma_rx.m_write" + end="sdram_0.s1"> int 1 @@ -17511,7 +20233,7 @@ parameters are a RESULT of the module parameters. --> long - 0x08002400 + 0x0000 false true true @@ -17533,17 +20255,17 @@ parameters are a RESULT of the module parameters. --> true true - cpu_0 - data_master - tse_mac - control_port + sgdma_rx + m_write + sdram_0 + s1 + start="tse_mac.receive" + end="sgdma_rx.in"> java.lang.String UNKNOWN @@ -17560,17 +20282,17 @@ parameters are a RESULT of the module parameters. --> true true - clk_0 - clk - tse_mac - control_port_clock_connection + tse_mac + receive + sgdma_rx + in + start="sgdma_tx.out" + end="tse_mac.transmit"> java.lang.String UNKNOWN @@ -17587,17 +20309,17 @@ parameters are a RESULT of the module parameters. --> true true - clk_0 - clk - sgdma_rx - clk + sgdma_tx + out + tse_mac + transmit + start="sgdma_tx.m_read" + end="sdram_0.s1"> int 1 @@ -17608,7 +20330,7 @@ parameters are a RESULT of the module parameters. --> long - 0x08100000 + 0x0000 false true true @@ -17630,20 +20352,28 @@ parameters are a RESULT of the module parameters. --> true true - cpu_0 - data_master - sgdma_rx - csr + sgdma_tx + m_read + sdram_0 + s1 - + name="sgdma_tx.descriptor_read/descriptor_memory.s1" + kind="avalon" + version="6.1" + start="sgdma_tx.descriptor_read" + end="descriptor_memory.s1"> + int - 4 + 1 + false + true + true + true + + + long + 0x04840000 false true true @@ -17665,44 +20395,33 @@ parameters are a RESULT of the module parameters. --> true true - cpu_0 - d_irq - sgdma_rx - csr_irq + sgdma_tx + descriptor_read + descriptor_memory + s1 - - java.lang.String - UNKNOWN + name="sgdma_tx.descriptor_write/descriptor_memory.s1" + kind="avalon" + version="6.1" + start="sgdma_tx.descriptor_write" + end="descriptor_memory.s1"> + + int + 1 false true true true - - boolean - false + + long + 0x04840000 false true true true - clk_0 - clk - descriptor_memory - clk1 - - java.lang.String UNKNOWN @@ -17719,17 +20438,17 @@ parameters are a RESULT of the module parameters. --> true true - clk_0 - clk - sgdma_tx - clk + sgdma_tx + descriptor_write + descriptor_memory + s1 + end="descriptor_memory.s1"> int 1 @@ -17740,7 +20459,7 @@ parameters are a RESULT of the module parameters. --> long - 0x08200000 + 0x04840000 false true true @@ -17764,23 +20483,15 @@ parameters are a RESULT of the module parameters. --> cpu_0 data_master - sgdma_tx - csr + descriptor_memory + s1 - - int - 5 - false - true - true - true - + start="clk_0.clk" + end="watchdog_timer.clk"> java.lang.String UNKNOWN @@ -17797,17 +20508,17 @@ parameters are a RESULT of the module parameters. --> true true - cpu_0 - d_irq - sgdma_tx - csr_irq + clk_0 + clk + watchdog_timer + clk + start="cpu_0.data_master" + end="watchdog_timer.s1"> int 1 @@ -17818,7 +20529,7 @@ parameters are a RESULT of the module parameters. --> long - 0x04840000 + 0x04880000 false true true @@ -17840,33 +20551,52 @@ parameters are a RESULT of the module parameters. --> true true - sgdma_rx - descriptor_read - descriptor_memory + cpu_0 + data_master + watchdog_timer s1 - + name="cpu_0.d_irq/watchdog_timer.irq" + kind="interrupt" + version="9.1" + start="cpu_0.d_irq" + end="watchdog_timer.irq"> + int - 1 + 6 false true true true - - long - 0x04840000 + + java.lang.String + UNKNOWN + false + true + true + true + + + boolean + false false true true true + cpu_0 + d_irq + watchdog_timer + irq + + java.lang.String UNKNOWN @@ -17883,17 +20613,17 @@ parameters are a RESULT of the module parameters. --> true true - sgdma_rx - descriptor_write - descriptor_memory - s1 + clk_0 + clk + sysid + clk + start="cpu_0.data_master" + end="sysid.control_slave"> int 1 @@ -17904,39 +20634,12 @@ parameters are a RESULT of the module parameters. --> long - 0x0000 - false - true - true - true - - - java.lang.String - UNKNOWN - false - true - true - true - - - boolean - false + 0x08000000 false true true true - sgdma_rx - m_write - sdram_0 - s1 - - java.lang.String UNKNOWN @@ -17953,17 +20656,17 @@ parameters are a RESULT of the module parameters. --> true true - tse_mac - receive - sgdma_rx - in + cpu_0 + data_master + sysid + control_slave + start="clk_0.clk" + end="ISP1362.clock_reset"> java.lang.String UNKNOWN @@ -17980,17 +20683,17 @@ parameters are a RESULT of the module parameters. --> true true - sgdma_tx - out - tse_mac - transmit + clk_0 + clk + ISP1362 + clock_reset + version="6.1" + start="cpu_0.data_master" + end="ISP1362.avalon_slave_0"> int 1 @@ -18001,7 +20704,7 @@ parameters are a RESULT of the module parameters. --> long - 0x0000 + 0x08220000 false true true @@ -18023,17 +20726,17 @@ parameters are a RESULT of the module parameters. --> true true - sgdma_tx - m_read - sdram_0 - s1 + cpu_0 + data_master + ISP1362 + avalon_slave_0 + start="cpu_0.data_master" + end="ISP1362.avalon_slave_1"> int 1 @@ -18044,7 +20747,7 @@ parameters are a RESULT of the module parameters. --> long - 0x04840000 + 0x08220020 false true true @@ -18066,28 +20769,20 @@ parameters are a RESULT of the module parameters. --> true true - sgdma_tx - descriptor_read - descriptor_memory - s1 + cpu_0 + data_master + ISP1362 + avalon_slave_1 - + name="cpu_0.d_irq/ISP1362.interrupt_sender_1" + kind="interrupt" + version="9.1" + start="cpu_0.d_irq" + end="ISP1362.interrupt_sender_1"> + int - 1 - false - true - true - true - - - long - 0x04840000 + 8 false true true @@ -18109,28 +20804,20 @@ parameters are a RESULT of the module parameters. --> true true - sgdma_tx - descriptor_write - descriptor_memory - s1 + cpu_0 + d_irq + ISP1362 + interrupt_sender_1 - + name="cpu_0.d_irq/ISP1362.interrupt_sender_0" + kind="interrupt" + version="9.1" + start="cpu_0.d_irq" + end="ISP1362.interrupt_sender_0"> + int - 1 - false - true - true - true - - - long - 0x04840000 + 7 false true true @@ -18153,16 +20840,16 @@ parameters are a RESULT of the module parameters. --> true cpu_0 - data_master - descriptor_memory - s1 + d_irq + ISP1362 + interrupt_sender_0 + end="pio_leds_front.clk"> java.lang.String UNKNOWN @@ -18181,15 +20868,15 @@ parameters are a RESULT of the module parameters. --> clk_0 clk - watchdog_timer + pio_leds_front clk + end="pio_leds_front.s1"> int 1 @@ -18200,7 +20887,7 @@ parameters are a RESULT of the module parameters. --> long - 0x04880000 + 0x04400020 false true true @@ -18224,23 +20911,55 @@ parameters are a RESULT of the module parameters. --> cpu_0 data_master - watchdog_timer + pio_leds_front s1 - + start="cpu_0.custom_instruction_master" + end="cpu_0_converter.s1"> + + java.lang.String + converter + false + true + true + true + + + java.lang.String + + true + true + true + true + + int - 6 + 1 + false + true + true + true + + + long + 0 false true true true + + int + -1 + true + true + true + true + java.lang.String UNKNOWN @@ -18258,16 +20977,56 @@ parameters are a RESULT of the module parameters. --> true cpu_0 - d_irq - watchdog_timer - irq + custom_instruction_master + cpu_0_converter + s1 + start="cpu_0.custom_instruction_master" + end="cpu_0_ffs_inst.nios_custom_instruction_slave_0"> + + java.lang.String + ffs_inst + false + true + true + true + + + java.lang.String + + true + true + true + true + + + int + 1 + false + true + true + true + + + long + 1 + false + true + true + true + + + int + -1 + true + true + true + true + java.lang.String UNKNOWN @@ -18284,17 +21043,33 @@ parameters are a RESULT of the module parameters. --> true true - clk_0 - clk - sysid - clk + cpu_0 + custom_instruction_master + cpu_0_ffs_inst + nios_custom_instruction_slave_0 + name="cpu_0.custom_instruction_master/cpu_0_fls_inst.nios_custom_instruction_slave_0" + kind="nios_custom_instruction" + version="9.1" + start="cpu_0.custom_instruction_master" + end="cpu_0_fls_inst.nios_custom_instruction_slave_0"> + + java.lang.String + fls_inst + false + true + true + true + + + java.lang.String + + true + true + true + true + int 1 @@ -18305,12 +21080,20 @@ parameters are a RESULT of the module parameters. --> long - 0x08000000 + 2 false true true true + + int + -1 + true + true + true + true + java.lang.String UNKNOWN @@ -18328,16 +21111,16 @@ parameters are a RESULT of the module parameters. --> true cpu_0 - data_master - sysid - control_slave + custom_instruction_master + cpu_0_fls_inst + nios_custom_instruction_slave_0 + end="pio_leds_board.clk"> java.lang.String UNKNOWN @@ -18356,15 +21139,15 @@ parameters are a RESULT of the module parameters. --> clk_0 clk - ISP1362 - clock_reset + pio_leds_board + clk + end="pio_leds_board.s1"> int 1 @@ -18375,7 +21158,7 @@ parameters are a RESULT of the module parameters. --> long - 0x08220000 + 0x04400040 false true true @@ -18399,31 +21182,15 @@ parameters are a RESULT of the module parameters. --> cpu_0 data_master - ISP1362 - avalon_slave_0 + pio_leds_board + s1 - - int - 1 - false - true - true - true - - - long - 0x08220020 - false - true - true - true - + name="clk_0.clk/pio_dipswitch.clk" + kind="clock" + version="9.1" + start="clk_0.clk" + end="pio_dipswitch.clk"> java.lang.String UNKNOWN @@ -18440,20 +21207,28 @@ parameters are a RESULT of the module parameters. --> true true - cpu_0 - data_master - ISP1362 - avalon_slave_1 - - - - int - 8 + clk_0 + clk + pio_dipswitch + clk + + + + int + 1 + false + true + true + true + + + long + 0x04400060 false true true @@ -18476,19 +21251,19 @@ parameters are a RESULT of the module parameters. --> true cpu_0 - d_irq - ISP1362 - interrupt_sender_1 + data_master + pio_dipswitch + s1 + end="pio_dipswitch.irq"> int - 7 + 9 false true true @@ -18512,71 +21287,103 @@ parameters are a RESULT of the module parameters. --> cpu_0 d_irq - ISP1362 - interrupt_sender_0 + pio_dipswitch + irq - 1 - avalon_tristate_master + 2 + nios_custom_instruction_slave com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint - Avalon Memory Mapped Tristate Master + Custom Instruction Slave 9.1 1 - clock_source + nios_custom_instruction_slave com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IModule - Clock Source + com.altera.entityinterfaces.IMutableConnectionPoint + Custom Instruction Slave 9.1 - 1 - altera_avalon_epcs_flash_controller + 2 + avalon_slave com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IModule - EPCS Serial Flash Controller + com.altera.entityinterfaces.IMutableConnectionPoint + Avalon Memory Mapped Slave 9.1 - 2 - avalon_streaming + 1 + clock_sink com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IConnection - Avalon Streaming Connection + com.altera.entityinterfaces.IMutableConnectionPoint + Clock Input 9.1 + + 7 + conduit + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Conduit Endpoint + 7.1 + 1 - clock_sink + interrupt_receiver com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint - Clock Input + Interrupt Receiver + 9.1 + + + 3 + altera_avalon_pio + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + PIO (Parallel I/O) 9.1 2 - altera_avalon_timer + altera_avalon_sgdma com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule - Interval Timer + Scatter-Gather DMA Controller 9.1 1 - altera_nios2 + altera_avalon_new_sdram_controller com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule - Nios II Processor + SDRAM Controller 9.1 - 15 - avalon_slave + 30 + avalon + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IConnection + Avalon Memory Mapped Connection + 6.1 + + + 1 + conduit_end com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint - Avalon Memory Mapped Slave + Conduit + 9.1 + + + 3 + nios_custom_instruction + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IConnection + Nios II Custom Instruction Connection 9.1 @@ -18588,51 +21395,51 @@ parameters are a RESULT of the module parameters. --> 9.1 - 2 - altera_avalon_onchip_memory2 + 1 + altera_nios2 com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule - On-Chip Memory (RAM or ROM) + Nios II Processor 9.1 2 - altera_avalon_sgdma + interrupt_sender com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IModule - Scatter-Gather DMA Controller + com.altera.entityinterfaces.IMutableConnectionPoint + Interrupt Sender 9.1 1 - clock_source + altera_avalon_tri_state_bridge com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IMutableConnectionPoint - Clock Output + com.altera.entityinterfaces.IModule + Avalon-MM Tristate Bridge 9.1 - 19 - clock + 1 + altera_avalon_jtag_uart com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IConnection - Clock Connection + com.altera.entityinterfaces.IModule + JTAG UART 9.1 - 7 - interrupt_sender + 10 + avalon_master com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint - Interrupt Sender + Avalon Memory Mapped Master 9.1 2 - avalon_slave + altera_avalon_timer com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IMutableConnectionPoint - Avalon Memory Mapped Slave + com.altera.entityinterfaces.IModule + Interval Timer 9.1 @@ -18643,36 +21450,44 @@ parameters are a RESULT of the module parameters. --> Avalon Streaming Sink 9.1 + + 2 + avalon_streaming + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IConnection + Avalon Streaming Connection + 9.1 + 1 - ISP1362_CTRL + altera_nios_custom_instr_endian_converter com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule - ISP1362_CTRL - 1.0 + Endian Converter + 6.1 1 - altera_avalon_cfi_flash + altera_avalon_sysid com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule - Flash Memory Interface (CFI) + System ID Peripheral 9.1 - 27 - avalon + 1 + altera_avalon_uart com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IConnection - Avalon Memory Mapped Connection - 6.1 + com.altera.entityinterfaces.IModule + UART (RS-232 Serial Port) + 9.1 - 1 - triple_speed_ethernet + 8 + interrupt_sender com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IModule - Triple-Speed Ethernet + com.altera.entityinterfaces.IMutableConnectionPoint + Interrupt Sender 9.1 @@ -18684,52 +21499,76 @@ parameters are a RESULT of the module parameters. --> 9.1 - 9 - interrupt + 22 + clock_sink + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Clock Input + 9.1 + + + 22 + clock com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IConnection - Interrupt Connection + Clock Connection 9.1 1 - altera_avalon_sysid + clock_source com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IModule - System ID Peripheral + com.altera.entityinterfaces.IMutableConnectionPoint + Clock Output 9.1 - 19 - clock_sink + 1 + nios_custom_instruction_master com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint - Clock Input + Custom Instruction Master 9.1 1 - conduit_end + triple_speed_ethernet com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IMutableConnectionPoint - Conduit + com.altera.entityinterfaces.IModule + Triple-Speed Ethernet 9.1 1 - altera_avalon_tri_state_bridge + ISP1362_CTRL com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule - Avalon-MM Tristate Bridge + ISP1362_CTRL + 1.0 + + + 1 + ffs + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + ffs + 1.0 + + + 1 + altera_avalon_cfi_flash + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IModule + Flash Memory Interface (CFI) 9.1 - 4 - conduit + 2 + altera_avalon_onchip_memory2 com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IMutableConnectionPoint - Conduit Endpoint - 7.1 + com.altera.entityinterfaces.IModule + On-Chip Memory (RAM or ROM) + 9.1 2 @@ -18740,61 +21579,53 @@ parameters are a RESULT of the module parameters. --> 9.1 - 10 - avalon_master + 18 + avalon_slave com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint - Avalon Memory Mapped Master + Avalon Memory Mapped Slave 9.1 1 - altera_avalon_uart + clock_source com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule - UART (RS-232 Serial Port) + Clock Source 9.1 1 - altera_avalon_jtag_uart + fls com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule - JTAG UART - 9.1 - - - 2 - interrupt_sender - com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IMutableConnectionPoint - Interrupt Sender - 9.1 + fls + 1.0 - 1 - interrupt_receiver + 10 + interrupt com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IMutableConnectionPoint - Interrupt Receiver + com.altera.entityinterfaces.IConnection + Interrupt Connection 9.1 1 - nios_custom_instruction_master + avalon_tristate_master com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint - Custom Instruction Master + Avalon Memory Mapped Tristate Master 9.1 1 - altera_avalon_new_sdram_controller + altera_avalon_epcs_flash_controller com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule - SDRAM Controller + EPCS Serial Flash Controller 9.1 9.1sp2 350 - 00151200020400000130BD2BD28E + 0023AE674DE000000135F150E472 -- cgit v1.2.3-54-g00ecf