From 267b9022dd49d0d4a2ee88044e8ff734d139a282 Mon Sep 17 00:00:00 2001 From: Tobias Klauser Date: Wed, 19 Jan 2011 17:21:56 +0100 Subject: Updates: Pull LEDS low, rename TSE MAC, add watchdog timer, add sysid --- quartus/dionysos_nios2mmu.sopc | 257 ++++++++++++++++++++++++++++++++--------- 1 file changed, 203 insertions(+), 54 deletions(-) (limited to 'quartus/dionysos_nios2mmu.sopc') diff --git a/quartus/dionysos_nios2mmu.sopc b/quartus/dionysos_nios2mmu.sopc index 1fc4c41..3ceafcf 100644 --- a/quartus/dionysos_nios2mmu.sopc +++ b/quartus/dionysos_nios2mmu.sopc @@ -4,6 +4,11 @@ { element jtag_uart_0.avalon_jtag_slave { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { value = "41953472"; @@ -14,7 +19,7 @@ { datum _sortIndex { - value = "5"; + value = "6"; type = "int"; } datum megawizard_uipreferences @@ -31,14 +36,32 @@ type = "int"; } } - element triple_speed_ethernet_0.control_port + element tse_mac.control_port { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { value = "41952256"; type = "long"; } } + element sysid.control_slave + { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } + datum baseAddress + { + value = "4759552"; + type = "long"; + } + } element cpu_0 { datum _sortIndex @@ -48,23 +71,33 @@ } datum megawizard_uipreferences { - value = "{}"; + value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos_nios2mmu/quartus}"; type = "String"; } } - element sgdma_tx.csr + element sgdma_rx.csr { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "41953344"; + value = "41953280"; type = "long"; } } - element sgdma_rx.csr + element sgdma_tx.csr { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "41953280"; + value = "41953344"; type = "long"; } } @@ -72,7 +105,7 @@ { datum _sortIndex { - value = "13"; + value = "14"; type = "int"; } datum megawizard_uipreferences @@ -86,6 +119,11 @@ } element epcs_flash_controller_0.epcs_control_port { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { value = "41949184"; @@ -96,7 +134,7 @@ { datum _sortIndex { - value = "7"; + value = "8"; type = "int"; } datum megawizard_uipreferences @@ -107,6 +145,11 @@ } element cpu_0.jtag_debug_module { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { value = "41947136"; @@ -117,7 +160,7 @@ { datum _sortIndex { - value = "9"; + value = "10"; type = "int"; } datum megawizard_uipreferences @@ -130,7 +173,7 @@ { datum _sortIndex { - value = "2"; + value = "3"; type = "int"; } datum megawizard_uipreferences @@ -139,61 +182,104 @@ type = "String"; } } - element cfi_flash_0.s1 + element onchip_memory2_0.s1 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "37748736"; + value = "41951232"; type = "long"; } } - element uart_0.s1 + element descriptor_memory.s1 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "41953440"; + value = "75759616"; type = "long"; } } - element descriptor_memory.s1 + element sdram_0.s1 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "0"; + value = "16777216"; type = "long"; } } - element onchip_memory2_0.s1 + element timer_0.s1 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "41951232"; + value = "41953408"; type = "long"; } } - element timer_0.s1 + element watchdog_timer.s1 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { - value = "41953408"; + value = "76021760"; type = "long"; } } - element sdram_0.s1 + element cfi_flash_0.s1 { datum _lockedAddress { - value = "0"; + value = "1"; type = "boolean"; } datum baseAddress { - value = "16777216"; + value = "37748736"; + type = "long"; + } + } + element uart_0.s1 + { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } + datum baseAddress + { + value = "41953440"; type = "long"; } } element onchip_memory2_0.s2 { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { value = "41951232"; @@ -204,7 +290,7 @@ { datum _sortIndex { - value = "3"; + value = "4"; type = "int"; } datum megawizard_uipreferences @@ -217,12 +303,12 @@ { datum _sortIndex { - value = "11"; + value = "12"; type = "int"; } datum megawizard_uipreferences { - value = "{}"; + value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos_nios2mmu/quartus}"; type = "String"; } } @@ -230,7 +316,20 @@ { datum _sortIndex { - value = "12"; + value = "13"; + type = "int"; + } + datum megawizard_uipreferences + { + value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos_nios2mmu/quartus}"; + type = "String"; + } + } + element sysid + { + datum _sortIndex + { + value = "2"; type = "int"; } datum megawizard_uipreferences @@ -243,12 +342,12 @@ { datum _sortIndex { - value = "6"; + value = "7"; type = "int"; } datum megawizard_uipreferences { - value = "{}"; + value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos_nios2mmu/quartus}"; type = "String"; } } @@ -256,7 +355,7 @@ { datum _sortIndex { - value = "4"; + value = "5"; type = "int"; } datum megawizard_uipreferences @@ -265,16 +364,16 @@ type = "String"; } } - element triple_speed_ethernet_0 + element tse_mac { datum _sortIndex { - value = "10"; + value = "11"; type = "int"; } datum megawizard_uipreferences { - value = "{}"; + value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos_nios2mmu/quartus}"; type = "String"; } } @@ -282,7 +381,20 @@ { datum _sortIndex { - value = "8"; + value = "9"; + type = "int"; + } + datum megawizard_uipreferences + { + value = "{}"; + type = "String"; + } + } + element watchdog_timer + { + datum _sortIndex + { + value = "15"; type = "int"; } datum megawizard_uipreferences @@ -298,8 +410,8 @@ dionysos_nios2mmu.qpf - - + + @@ -336,7 +448,7 @@ - + @@ -501,11 +613,7 @@ - + @@ -622,6 +730,22 @@ + + + + + + + + + + + + + end="tse_mac.receive_clock_connection" /> + end="tse_mac.transmit_clock_connection" /> + end="tse_mac.control_port"> @@ -798,7 +922,7 @@ kind="clock" version="9.1" start="clk_0.clk" - end="triple_speed_ethernet_0.control_port_clock_connection" /> + end="tse_mac.control_port_clock_connection" /> - + - + @@ -859,13 +983,13 @@ + end="tse_mac.transmit" /> @@ -876,7 +1000,7 @@ start="sgdma_tx.descriptor_read" end="descriptor_memory.s1"> - + - + - + + + + + + + + + + + + + + -- cgit v1.2.3-54-g00ecf