From aaf0cef1601990fd5b1f01a893f85d141c3e486c Mon Sep 17 00:00:00 2001 From: Tobias Klauser Date: Thu, 17 Jun 2010 10:37:48 +0200 Subject: Update to Quartus 9.1 SP2 --- quartus/dionysos_nios2mmu.qsf | 2 +- quartus/dionysos_nios2mmu.sopc | 42 +++++---- quartus/dionysos_nios2mmu.sopcinfo | 180 ++++++++++++++++++------------------- 3 files changed, 116 insertions(+), 108 deletions(-) (limited to 'quartus') diff --git a/quartus/dionysos_nios2mmu.qsf b/quartus/dionysos_nios2mmu.qsf index a51bd81..2aa3d7f 100644 --- a/quartus/dionysos_nios2mmu.qsf +++ b/quartus/dionysos_nios2mmu.qsf @@ -47,7 +47,7 @@ set_global_assignment -name DEVICE EP3C40F484C6 set_global_assignment -name TOP_LEVEL_ENTITY "dionysos_top" set_global_assignment -name ORIGINAL_QUARTUS_VERSION 9.1 set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:15:51 FEBRUARY 22, 2010" -set_global_assignment -name LAST_QUARTUS_VERSION 9.1 +set_global_assignment -name LAST_QUARTUS_VERSION "9.1 SP2" set_global_assignment -name SMART_RECOMPILE ON set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL diff --git a/quartus/dionysos_nios2mmu.sopc b/quartus/dionysos_nios2mmu.sopc index 441628a..02ecb7e 100644 --- a/quartus/dionysos_nios2mmu.sopc +++ b/quartus/dionysos_nios2mmu.sopc @@ -6,7 +6,7 @@ { datum baseAddress { - value = "41951296"; + value = "41952320"; type = "long"; } } @@ -40,7 +40,7 @@ } datum megawizard_uipreferences { - value = "{output_language=VHDL, output_directory=/home/tklauser/projects/dionysos_nios2mmu/quartus}"; + value = "{}"; type = "String"; } } @@ -102,19 +102,27 @@ type = "String"; } } - element cfi_flash_0.s1 + element onchip_memory2_0.s1 { datum baseAddress { - value = "37748736"; + value = "41951232"; type = "long"; } } - element onchip_memory2_0.s1 + element uart_0.s1 + { + datum baseAddress + { + value = "41952288"; + type = "long"; + } + } + element cfi_flash_0.s1 { datum baseAddress { - value = "4096"; + value = "37748736"; type = "long"; } } @@ -131,15 +139,15 @@ type = "long"; } } - element uart_0.s1 + element timer_0.s1 { datum baseAddress { - value = "41951264"; + value = "41952256"; type = "long"; } } - element timer_0.s1 + element onchip_memory2_0.s2 { datum baseAddress { @@ -206,8 +214,8 @@ dionysos_nios2mmu.qpf - - + + @@ -247,7 +255,7 @@ - + @@ -508,7 +516,7 @@ start="cpu_0.data_master" end="timer_0.s1"> - + @@ -516,7 +524,7 @@ - + @@ -528,7 +536,7 @@ start="cpu_0.data_master" end="jtag_uart_0.avalon_jtag_slave"> - + - + - + diff --git a/quartus/dionysos_nios2mmu.sopcinfo b/quartus/dionysos_nios2mmu.sopcinfo index 537f4d8..a44e48a 100644 --- a/quartus/dionysos_nios2mmu.sopcinfo +++ b/quartus/dionysos_nios2mmu.sopcinfo @@ -3,8 +3,8 @@ name="dionysos_nios2mmu" kind="com_altera_sopcmodel_ensemble_Ensemble" version="9.1"> - - + + com.altera.entityinterfaces.moduleext.IDeviceFamily$EDeviceFamily @@ -48,7 +48,7 @@ long - -19653124377 + -23323565077 false true true @@ -56,7 +56,7 @@ long - 1269616531099 + 1276249234420 false true true @@ -433,7 +433,7 @@ the requested settings for a module instance. --> embeddedsw.CMacro.FAST_TLB_MISS_EXCEPTION_ADDR - 0xc0001000 + 0xc2802000 embeddedsw.configuration.mmu_TLBMissExcSlave @@ -485,7 +485,7 @@ the requested settings for a module instance. --> embeddedsw.CMacro.HARDWARE_DIVIDE_PRESENT - 0 + 1 embeddedsw.CMacro.HARDWARE_MULTIPLY_PRESENT @@ -559,7 +559,7 @@ the requested settings for a module instance. --> boolean false false - false + true true true @@ -781,7 +781,7 @@ the requested settings for a module instance. --> boolean - false + true false true true @@ -1813,7 +1813,7 @@ parameters are a RESULT of the module parameters. --> onchip_memory2_0 s1 onchip_memory2_0.s1 - 4096 + 41951232 1024 @@ -2162,7 +2162,7 @@ parameters are a RESULT of the module parameters. --> timer_0 s1 timer_0.s1 - 41951232 + 41952256 32 @@ -2170,7 +2170,7 @@ parameters are a RESULT of the module parameters. --> uart_0 s1 uart_0.s1 - 41951264 + 41952288 32 @@ -2178,7 +2178,7 @@ parameters are a RESULT of the module parameters. --> jtag_uart_0 avalon_jtag_slave jtag_uart_0.avalon_jtag_slave - 41951296 + 41952320 8 @@ -2579,7 +2579,7 @@ parameters are a RESULT of the module parameters. --> onchip_memory2_0 s2 onchip_memory2_0.s2 - 0 + 41951232 1024 @@ -9183,7 +9183,7 @@ parameters are a RESULT of the module parameters. --> long - 0x02802000 + 0x02802400 false true true @@ -9288,7 +9288,7 @@ parameters are a RESULT of the module parameters. --> long - 0x02802020 + 0x02802420 false true true @@ -9393,7 +9393,7 @@ parameters are a RESULT of the module parameters. --> long - 0x02802040 + 0x02802440 false true true @@ -9525,7 +9525,7 @@ parameters are a RESULT of the module parameters. --> long - 0x1000 + 0x02802000 false true true @@ -9568,7 +9568,7 @@ parameters are a RESULT of the module parameters. --> long - 0x0000 + 0x02802000 false true true @@ -9597,26 +9597,18 @@ parameters are a RESULT of the module parameters. --> 1 - nios_custom_instruction_master + clock_source com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint - Custom Instruction Master + Clock Output 9.1 1 - altera_nios2 + altera_avalon_epcs_flash_controller com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule - Nios II Processor - 9.1 - - - 4 - interrupt - com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IConnection - Interrupt Connection + EPCS Serial Flash Controller 9.1 @@ -9629,50 +9621,50 @@ parameters are a RESULT of the module parameters. --> 1 - altera_avalon_tri_state_bridge + altera_avalon_new_sdram_controller com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule - Avalon-MM Tristate Bridge + SDRAM Controller 9.1 - 1 - altera_avalon_cfi_flash + 3 + conduit com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IModule - Flash Memory Interface (CFI) - 9.1 + com.altera.entityinterfaces.IMutableConnectionPoint + Conduit Endpoint + 7.1 1 - clock_source + altera_avalon_jtag_uart com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule - Clock Source + JTAG UART 9.1 - 9 - avalon_slave + 13 + avalon com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IMutableConnectionPoint - Avalon Memory Mapped Slave - 9.1 + com.altera.entityinterfaces.IConnection + Avalon Memory Mapped Connection + 6.1 - 1 - altera_avalon_epcs_flash_controller + 11 + clock_sink com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IModule - EPCS Serial Flash Controller + com.altera.entityinterfaces.IMutableConnectionPoint + Clock Input 9.1 - 4 - avalon_master + 1 + interrupt_receiver com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint - Avalon Memory Mapped Master + Interrupt Receiver 9.1 @@ -9685,42 +9677,42 @@ parameters are a RESULT of the module parameters. --> 1 - altera_avalon_uart + avalon_tristate_master com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IModule - UART (RS-232 Serial Port) + com.altera.entityinterfaces.IMutableConnectionPoint + Avalon Memory Mapped Tristate Master 9.1 1 - altera_avalon_jtag_uart + altera_avalon_cfi_flash com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule - JTAG UART + Flash Memory Interface (CFI) 9.1 - 1 - altera_avalon_timer + 4 + avalon_master com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IModule - Interval Timer + com.altera.entityinterfaces.IMutableConnectionPoint + Avalon Memory Mapped Master 9.1 - 11 - clock_sink + 1 + altera_nios2 com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IMutableConnectionPoint - Clock Input + com.altera.entityinterfaces.IModule + Nios II Processor 9.1 1 - avalon_tristate_master + nios_custom_instruction_master com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint - Avalon Memory Mapped Tristate Master + Custom Instruction Master 9.1 @@ -9732,61 +9724,69 @@ parameters are a RESULT of the module parameters. --> 9.1 - 4 - interrupt_sender + 1 + clock_source com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IMutableConnectionPoint - Interrupt Sender + com.altera.entityinterfaces.IModule + Clock Source 9.1 1 - altera_avalon_onchip_memory2 + altera_avalon_timer com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule - On-Chip Memory (RAM or ROM) + Interval Timer 9.1 1 - interrupt_receiver + altera_avalon_tri_state_bridge com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IMutableConnectionPoint - Interrupt Receiver + com.altera.entityinterfaces.IModule + Avalon-MM Tristate Bridge 9.1 - 3 - conduit + 9 + avalon_slave com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IMutableConnectionPoint - Conduit Endpoint - 7.1 + Avalon Memory Mapped Slave + 9.1 1 - clock_source + altera_avalon_uart com.altera.entityinterfaces.IElementClass - com.altera.entityinterfaces.IMutableConnectionPoint - Clock Output + com.altera.entityinterfaces.IModule + UART (RS-232 Serial Port) 9.1 - 13 - avalon + 4 + interrupt com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IConnection - Avalon Memory Mapped Connection - 6.1 + Interrupt Connection + 9.1 1 - altera_avalon_new_sdram_controller + altera_avalon_onchip_memory2 com.altera.entityinterfaces.IElementClass com.altera.entityinterfaces.IModule - SDRAM Controller + On-Chip Memory (RAM or ROM) + 9.1 + + + 4 + interrupt_sender + com.altera.entityinterfaces.IElementClass + com.altera.entityinterfaces.IMutableConnectionPoint + Interrupt Sender 9.1 - 9.1 222 - 001B213B645F000001279B0ACCA1 + 9.1sp2 350 + 0023AE674DE0000001292660CE4E -- cgit v1.2.3-54-g00ecf