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authorHaim Dreyfuss <haim.dreyfuss@intel.com>2016-03-20 17:57:22 +0200
committerLuca Coelho <luciano.coelho@intel.com>2016-09-16 09:10:24 +0300
commit496d83caf354a84a3159c3b7aee9276640982e56 (patch)
tree3597c29c2939997c735a6ee726876215874467d6 /Documentation/i2c
parentc46e7724bfe9bbff17bc468903a757248b99e4ed (diff)
iwlwifi: pcie: Configure shared interrupt vector in MSIX mode
In case the OS provides fewer interrupts than requested, different causes will share the same interrupt vector as follow: 1.One interrupt less: non rx causes shared with FBQ. 2.Two interrupts less: non rx causes shared with FBQ and RSS. 3.More than two interrupts: we will use fewer RSS queues. Also make the request depend on the number of online CPUs instead of possible CPUs. Signed-off-by: Haim Dreyfuss <haim.dreyfuss@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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