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authorSunil Goutham <sgoutham@cavium.com>2016-08-30 11:36:27 +0530
committerDavid S. Miller <davem@davemloft.net>2016-09-01 14:50:47 -0700
commit7ceb8a1319ec64954459d474dd4a8c3c60ff0999 (patch)
tree48fb486737e02a17d63e8e8f4a6395367d64231e /Documentation/i2c
parent57e81d44b0e1aa4dcb479ff8de8fc34cf635d0e8 (diff)
net: thunderx: Fix for issues with multiple CQEs posted for a TSO packet
On ThunderX 88xx pass 2.x chips when TSO is offloaded to HW, HW posts a CQE for every TSO segment transmitted. Current code does handles this, but is prone to issues when segment sizes are small resulting in SW processing too many CQEs and also at times frees a SKB which is not yet transmitted. This patch handles the errata in a different way and eliminates issues with earlier approach, TSO packet is submitted to HW with post_cqe=0, so that no CQE is posted upon completion of transmission of TSO packet but a additional HDR + IMMEDIATE descriptors are added to SQ due to which a CQE is posted and will have required info to be used while cleanup in napi. This way only one CQE is posted for a TSO packet. Signed-off-by: Sunil Goutham <sgoutham@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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