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| author | Tim Gore <tim.gore@intel.com> | 2016-06-13 12:15:01 +0100 |
|---|---|---|
| committer | Mika Kuoppala <mika.kuoppala@intel.com> | 2016-07-15 15:51:30 +0300 |
| commit | 12be73a0f13ad5a044346d564804b4058426d4c2 (patch) | |
| tree | 1dc6ce80dfceb538999b02503b83740072eb8fa4 /Documentation/iostats.txt | |
| parent | a89bd7beb1791ad5ed634989b14c764114a68e53 (diff) | |
drm/i915/gen9: implement WaConextSwitchWithConcurrentTLBInvalidate
This patch enables a workaround for a mid thread preemption
issue where a hardware timing problem can prevent the
context restore from happening, leading to a hang.
v2: move to gen9_init_workarounds (Arun)
v3: move to start of gen9_init_workarounds (Arun)
Signed-off-by: Tim Gore <tim.gore@intel.com>
Reviewed-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1465816501-25557-1-git-send-email-tim.gore@intel.com
(cherry picked from commit a8ab5ed5e1bf856eceaab5579236de6f92822b9f)
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Diffstat (limited to 'Documentation/iostats.txt')
0 files changed, 0 insertions, 0 deletions