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authorAlan Brady <alan.brady@intel.com>2016-11-28 16:06:02 -0800
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2017-02-02 22:42:40 -0800
commit1c0e6a3613d3f0bb088a3160095c8da4c1214d02 (patch)
tree29f4d635e34ac6c91fde5faaaaa0662749902d5c /arch/arm/mach-pxa
parent04766b22cf805011620f546384b271586548e8a7 (diff)
i40e: refactor macro INTRL_USEC_TO_REG
This patch refactors the macro INTRL_USEC_TO_REG into a static inline function and fixes a couple subtle bugs caused by the macro. This patch fixes a bug which was caused by passing a bad register value to the firmware. If enabling interrupt rate limiting, a non-zero value for the rate limit must be used. Otherwise the firmware sets the interrupt rate limit to the maximum value. Due to the limited resolution of the register, attempting to set a value of 1, 2, or 3 would be rounded down to 0 and limiting was left enabled, causing unexpected behavior. This patch also fixes a possible bug in which using the macro itself can introduce unintended side-affects because the macro argument is used more than once in the macro definition (e.g. a variable post-increment argument would perform a double increment on the variable). Without this patch, attempting to set interrupt rate limits of 1, 2, or 3 results in unexpected behavior and future use of this macro could cause subtle bugs. Change-Id: I83ac842de0ca9c86761923d6e3a4d7b1b95f2b3f Signed-off-by: Alan Brady <alan.brady@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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