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authorJakub Kicinski <jakub.kicinski@netronome.com>2017-02-09 09:17:32 -0800
committerDavid S. Miller <davem@davemloft.net>2017-02-10 15:52:25 -0500
commita0d8e02c35ff6068925d8c5ff4202b561aa90de6 (patch)
tree4abb78b2781c021d8eb88567f01b9f9f826b4097 /include/crypto/des.h
parent59a8474888e9b06252ebe8979630b371c926a00c (diff)
nfp: add support for reading nffw info
NFFW info is a resource which contains information about the loaded application firmware. Add code which will allow us to decode it and retrieve MIP location. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/crypto/des.h')
0 files changed, 0 insertions, 0 deletions
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2025-01-21 05:57:47 +0000
to enable HWP, and so it runs in HWP mode, exposing this incorrect BIOS configuration. There are several ways to address this problem. First, Linux can also run in legacy P-state mode on this system. As intel_pstate is how Linux enables HWP, booting with "intel_pstate=disable" will run in acpi-cpufreq/ondemand legacy p-state mode. Or second, the "performance" governor can be used with intel_pstate, which will modify HWP.EPP to 0. Or third, starting in 4.10, the /sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference attribute in can be updated from "balance_power" to "performance". Or fourth, apply this patch, which fixes the erroneous setting of MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default configuration to function as designed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Cc: 4.6+ <stable@vger.kernel.org> # 4.6+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'include/math-emu/soft-fp.h')