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authorDaniel Golle <daniel@makrotopia.org>2017-01-20 14:28:25 +0100
committerKalle Valo <kvalo@codeaurora.org>2017-01-28 09:03:45 +0200
commit5c4412e0728063583ec971323f8256e8005a32b6 (patch)
tree1b5fb249b6db699d5e22b09c699f18c64f1738f8 /include/drm/drm_drv.h
parent34db70b92faed22f59fdc1dba766e8cb6248fe9e (diff)
rt2x00: rt2800lib: add support for RT3352 with 20MHz crystal
On Rt3352 the driver needs to know the frequency of an external crystal which can be either 40 MHz (as on all other WiSoCs until now) or 20 MHz. Get the clock attached by ramips WiSoC platform code which probes SYSC_REG_SYSCFG (added by John Crispin in commit 6ac8579b96e3b) and introduce a new flag clk_is_20mhz in struct hw_mode_spec to make the driver aware and use either 40 MHz or 20 MHz specific rf_vals on those WiSoC platforms. The introduced support for boards with a 20 MHz crystal is also needed for RT5350. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Mathias Kresin <dev@kresin.me> Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat (limited to 'include/drm/drm_drv.h')
0 files changed, 0 insertions, 0 deletions
sing break statement. net: netcp: ethss: fix 10gbe host port tx pri map configuration net: netcp: ethss: fix errors in ethtool ops fsl/fman: enable compilation on ARM64 fsl/fman: A007273 only applies to PPC SoCs powerpc: fsl/fman: remove fsl,fman from of_device_ids[] fsl/fman: fix 1G support for QSGMII interfaces dt: bindings: net: use boolean dt properties for eee broken modes net: phy: use boolean dt properties for eee broken modes net: phy: fix sign type error in genphy_config_eee_advert ipv4: Should use consistent conditional judgement for ip fragment in __ip_append_data and ip_finish_output ...
Diffstat (limited to 'include/dt-bindings/reset/stih415-resets.h')