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| author | Rex Zhu <Rex.Zhu@amd.com> | 2017-01-10 19:26:49 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-01-12 17:39:11 -0500 |
| commit | 3731d12dce83d47b357753ffc450ce03f1b49688 (patch) | |
| tree | e873e0ff705c220f99c8c1959ca5805ab9042dc6 /include | |
| parent | a628392cf03e0eef21b345afbb192cbade041741 (diff) | |
drm/amd/powerplay: fix vce cg logic error on CZ/St.
can fix Bug 191281: vce ib test failed.
when vce idle, set vce clock gate, so the clock
in vce domain will be disabled.
when need to encode, disable vce clock gate,
enable the clocks to vce engine.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions