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authorJon Cooper <jcooper@solarflare.com>2017-02-08 16:51:02 +0000
committerDavid S. Miller <davem@davemloft.net>2017-02-09 16:47:53 -0500
commitda50ae2eae96e00e0188b24014efc10161e60925 (patch)
treec42954a9b66dbdbd47e6226dcce73a907a05414a /sound/pci/ctxfi/ctsrc.h
parenta0ee3541483767e82bf26b8269693eec25c01cba (diff)
sfc: set csum_level for encapsulated packets
Set the csum_level for encapsulated packets where the encapsulation type, l3 class and l4 class are sets that need it. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'sound/pci/ctxfi/ctsrc.h')
0 files changed, 0 insertions, 0 deletions
rovide the ACPI/CPPC table, that Windows requires to enable HWP, and so Windows runs in legacy P-state mode, where this setting has no effect. Linux' intel_pstate driver does not require ACPI/CPPC to enable HWP, and so it runs in HWP mode, exposing this incorrect BIOS configuration. There are several ways to address this problem. First, Linux can also run in legacy P-state mode on this system. As intel_pstate is how Linux enables HWP, booting with "intel_pstate=disable" will run in acpi-cpufreq/ondemand legacy p-state mode. Or second, the "performance" governor can be used with intel_pstate, which will modify HWP.EPP to 0. Or third, starting in 4.10, the /sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference attribute in can be updated from "balance_power" to "performance". Or fourth, apply this patch, which fixes the erroneous setting of MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default configuration to function as designed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Cc: 4.6+ <stable@vger.kernel.org> # 4.6+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'sound/soc/blackfin/bfin-eval-adau1x61.c')