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authorDavid S. Miller <davem@davemloft.net>2017-02-10 11:38:10 -0500
committerDavid S. Miller <davem@davemloft.net>2017-02-10 11:38:10 -0500
commit94134bf89a4747ac370ffea614a2ba483edf0ccc (patch)
tree0ab1c7617292ca22d3d4f627a7ead0ccaa5922ce /tools/arch/x86/include
parentb4c4ebcf3ca22bf9b04fa9c6ccfbfdfe0a256d07 (diff)
parent40c81b25b16cd871afe70630c131bd2544848d1f (diff)
Merge branch 'sched-cls_api-small-cleanup'
Jiri Pirko says: ==================== sched: cls_api: small cleanup This patchset makes couple of things in cls_api code a bit nicer and easier for reader to digest. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/arch/x86/include')
0 files changed, 0 insertions, 0 deletions
run in legacy P-state mode on this system. As intel_pstate is how Linux enables HWP, booting with "intel_pstate=disable" will run in acpi-cpufreq/ondemand legacy p-state mode. Or second, the "performance" governor can be used with intel_pstate, which will modify HWP.EPP to 0. Or third, starting in 4.10, the /sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference attribute in can be updated from "balance_power" to "performance". Or fourth, apply this patch, which fixes the erroneous setting of MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default configuration to function as designed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Cc: 4.6+ <stable@vger.kernel.org> # 4.6+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'tools/perf/bench/mem-memcpy-x86-64-asm-def.h')