/* * BSD LICENSE * * Copyright(c) 2015 Broadcom Corporation. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Broadcom Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /dts-v1/; #include "ns2.dtsi" / { model = "Broadcom NS2 SVK"; compatible = "brcm,ns2-svk", "brcm,ns2"; aliases { serial0 = &uart3; serial1 = &uart0; serial2 = &uart1; serial3 = &uart2; }; chosen { stdout-path = "serial0:115200n8"; bootargs = "earlycon=uart8250,mmio32,0x66130000"; }; memory { device_type = "memory"; reg = <0x000000000 0x80000000 0x00000000 0x40000000>; }; }; &enet { status = "ok"; }; &pci_phy0 { status = "ok"; }; &pci_phy1 { status = "ok"; }; &pcie0 { status = "ok"; }; &pcie4 { status = "ok"; }; &i2c0 { status = "ok"; }; &i2c1 { status = "ok"; }; &uart0 { status = "ok"; }; &uart1 { status = "ok"; }; &uart2 { status = "ok"; }; &uart3 { status = "ok"; }; &ssp0 { status = "ok"; slic@0 { compatible = "silabs,si3226x"; reg = <0>; spi-max-frequency = <5000000>; spi-cpha = <1>; spi-cpol = <1>; pl022,hierarchy = <0>; pl022,interface = <0>; pl022,slave-tx-disable = <0>; pl022,com-mode = <0>; pl022,rx-level-trig = <1>; pl022,tx-level-trig = <1>; pl022,ctrl-len = <11>; pl022,wait-state = <0>; pl022,duplex = <0>; }; }; &ssp1 { status = "ok"; at25@0 { compatible = "atmel,at25"; reg = <0>; spi-max-frequency = <5000000>; at25,byte-len = <0x8000>; at25,addr-mode = <2>; at25,page-size = <64>; spi-cpha = <1>; spi-cpol = <1>; pl022,hierarchy = <0>; pl022,interface = <0>; pl022,slave-tx-disable = <0>; pl022,com-mode = <0>; pl022,rx-level-trig = <1>; pl022,tx-level-trig = <1>; pl022,ctrl-len = <11>; pl022,wait-state = <0>; pl022,duplex = <0>; }; }; &sata_phy0 { status = "ok"; }; &sata_phy1 { status = "ok"; }; &sata { status = "ok"; }; &sdio0 { status = "ok"; }; &sdio1 { status = "ok"; }; &nand { nandcs@0 { compatible = "brcm,nandcs"; reg = <0>; nand-ecc-mode = "hw"; nand-ecc-strength = <8>; nand-ecc-step-size = <512>; nand-bus-width = <16>; brcm,nand-oob-sector-size = <16>; #address-cells = <1>; #size-cells = <1>; }; }; &mdio_mux_iproc { mdio@10 { gphy0: eth-phy@10 { enet-phy-lane-swap; reg = <0x10>; }; }; }; &pinctrl { pinctrl-names = "default"; pinctrl-0 = <&nand_sel>; nand_sel: nand_sel { function = "nand"; groups = "nand_grp"; }; }; &qspi { bspi-sel = <0>; flash: m25p80@0 { #address-cells = <1>; #size-cells = <1>; compatible = "m25p80"; reg = <0x0>; spi-max-frequency = <12500000>; m25p,fast-read; spi-cpol; spi-cpha; partition@0 { label = "boot"; reg = <0x00000000 0x000a0000>; }; partition@a0000 { label = "env"; reg = <0x000a0000 0x00060000>; }; partition@100000 { label = "system"; reg = <0x00100000 0x00600000>; }; partition@700000 { label = "rootfs"; reg = <0x00700000 0x01900000>; }; }; };