/* * Copyright (C) 2013 Imagination Technologies * Author: Paul Burton * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ #include #include #include #include #include void __iomem *mips_cpc_base; static DEFINE_PER_CPU_ALIGNED(spinlock_t, cpc_core_lock); static DEFINE_PER_CPU_ALIGNED(unsigned long, cpc_core_lock_flags); /** * mips_cpc_phys_base - retrieve the physical base address of the CPC * * This function returns the physical base address of the Cluster Power * Controller memory mapped registers, or 0 if no Cluster Power Controller * is present. */ static phys_addr_t mips_cpc_phys_base(void) { unsigned long cpc_base; if (!mips_cm_present()) return 0; if (!(read_gcr_cpc_status() & CM_GCR_CPC_STATUS_EX_MSK)) return 0; /* If the CPC is already enabled, leave it so */ cpc_base = read_gcr_cpc_base(); if (cpc_base & CM_GCR_CPC_BASE_CPCEN_MSK) return cpc_base & CM_GCR_CPC_BASE_CPCBASE_MSK; /* Otherwise, give it the default address & enable it */ cpc_base = mips_cpc_default_phys_base(); write_gcr_cpc_base(cpc_base | CM_GCR_CPC_BASE_CPCEN_MSK); return cpc_base; } int mips_cpc_probe(void) { phys_addr_t addr; unsigned cpu; for_each_possible_cpu(cpu) spin_lock_init(&per_cpu(cpc_core_lock, cpu)); addr = mips_cpc_phys_base(); if (!addr) return -ENODEV; mips_cpc_base = ioremap_nocache(addr, 0x8000); if (!mips_cpc_base) return -ENXIO; return 0; } void mips_cpc_lock_other(unsigned int core) { unsigned curr_core; preempt_disable(); curr_core = current_cpu_data.core; spin_lock_irqsave(&per_cpu(cpc_core_lock, curr_core), per_cpu(cpc_core_lock_flags, curr_core)); write_cpc_cl_other(core << CPC_Cx_OTHER_CORENUM_SHF); /* * Ensure the core-other region reflects the appropriate core & * VP before any accesses to it occur. */ mb(); } void mips_cpc_unlock_other(void) { unsigned curr_core = current_cpu_data.core; spin_unlock_irqrestore(&per_cpu(cpc_core_lock, curr_core), per_cpu(cpc_core_lock_flags, curr_core)); preempt_enable(); } lue='grep'>log msg
path: root/sound/pci/sis7019.h
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authorMark Rutland <mark.rutland@arm.com>2017-01-25 19:30:09 +0000
committerMark Brown <broonie@kernel.org>2017-01-25 21:05:37 +0000
commit1372cef1c697d8aac0cc923f8aa2c37d790ec9ed (patch)
treeed5f350cd559bc15ae370f0c9fd280204e98597d /sound/pci/sis7019.h
parentd00b74613fb18dfd0a5aa99270ee2e72d5c808d7 (diff)
regulator: fixed: Revert support for ACPI interface
This reverts commit 13bed58ce874 (regulator: fixed: add support for ACPI interface). While there does appear to be a practical need to manage regulators on ACPI systems, using ad-hoc properties to describe regulators to the kernel presents a number of problems (especially should ACPI gain first class support for such things), and there are ongoing discussions as to how to manage this. Until there is a rough consensus, revert commit 13bed58ce8748d43, which hasn't been in a released kernel yet as discussed in [1] and the surrounding thread. [1] http://lkml.kernel.org/r/20170125184949.x2wkoo7kbaaajkjk@sirena.org.uk Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Lu Baolu <baolu.lu@linux.intel.com> Cc: Mark Brown <broonie@kernel.org> Cc: Rafael J. Wysocki <rafael@kernel.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/pci/sis7019.h')
https://bugzilla.opensuse.org/show_bug.cgi?id=1022181 Tested-by: lists@ssl-mail.com Tested-by: Jayachandran C. <jnair@caviumnetworks.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v4.2+
Diffstat (limited to 'sound/soc/codecs/ak4535.h')