/* * misc setup functions for MPC83xx * * Maintainer: Kumar Gala * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ #include #include #include #include #include #include #include #include #include #include #include "mpc83xx.h" static __be32 __iomem *restart_reg_base; static int __init mpc83xx_restart_init(void) { /* map reset restart_reg_baseister space */ restart_reg_base = ioremap(get_immrbase() + 0x900, 0xff); return 0; } arch_initcall(mpc83xx_restart_init); void __noreturn mpc83xx_restart(char *cmd) { #define RST_OFFSET 0x00000900 #define RST_PROT_REG 0x00000018 #define RST_CTRL_REG 0x0000001c local_irq_disable(); if (restart_reg_base) { /* enable software reset "RSTE" */ out_be32(restart_reg_base + (RST_PROT_REG >> 2), 0x52535445); /* set software hard reset */ out_be32(restart_reg_base + (RST_CTRL_REG >> 2), 0x2); } else { printk (KERN_EMERG "Error: Restart registers not mapped, spinning!\n"); } for (;;) ; } long __init mpc83xx_time_init(void) { #define SPCR_OFFSET 0x00000110 #define SPCR_TBEN 0x00400000 __be32 __iomem *spcr = ioremap(get_immrbase() + SPCR_OFFSET, 4); __be32 tmp; tmp = in_be32(spcr); out_be32(spcr, tmp | SPCR_TBEN); iounmap(spcr); return 0; } void __init mpc83xx_ipic_init_IRQ(void) { struct device_node *np; /* looking for fsl,pq2pro-pic which is asl compatible with fsl,ipic */ np = of_find_compatible_node(NULL, NULL, "fsl,ipic"); if (!np) np = of_find_node_by_type(NULL, "ipic"); if (!np) return; ipic_init(np, 0); of_node_put(np); /* Initialize the default interrupt mapping priorities, * in case the boot rom changed something on us. */ ipic_set_default_priority(); } #ifdef CONFIG_QUICC_ENGINE void __init mpc83xx_qe_init_IRQ(void) { struct device_node *np; np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic"); if (!np) { np = of_find_node_by_type(NULL, "qeic"); if (!np) return; } qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic); of_node_put(np); } void __init mpc83xx_ipic_and_qe_init_IRQ(void) { mpc83xx_ipic_init_IRQ(); mpc83xx_qe_init_IRQ(); } #endif /* CONFIG_QUICC_ENGINE */ static const struct of_device_id of_bus_ids[] __initconst = { { .type = "soc", }, { .compatible = "soc", }, { .compatible = "simple-bus" }, { .compatible = "gianfar" }, { .compatible = "gpio-leds", }, { .type = "qe", }, { .compatible = "fsl,qe", }, {}, }; int __init mpc83xx_declare_of_platform_devices(void) { of_platform_bus_probe(NULL, of_bus_ids, NULL); return 0; } #ifdef CONFIG_PCI void __init mpc83xx_setup_pci(void) { struct device_node *np; for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") mpc83xx_add_bridge(np); for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie") mpc83xx_add_bridge(np); } #endif 2d530d3b268eef542c5414e54bf1a'>hda_jack.c
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authorIago Abal <mail@iagoabal.eu>2017-01-11 14:00:21 +0100
committerVinod Koul <vinod.koul@intel.com>2017-01-25 15:35:11 +0530
commit91539eb1fda2d530d3b268eef542c5414e54bf1a (patch)
tree960f5ca6342ad20837aff18aad6e8ecd7da32fd6 /sound/pci/hda/hda_jack.c
parent6610d0edf6dc7ee97e46ab3a538a565c79d26199 (diff)
dmaengine: pl330: fix double lock
The static bug finder EBA (http://www.iagoabal.eu/eba/) reported the following double-lock bug: Double lock: 1. spin_lock_irqsave(pch->lock, flags) at pl330_free_chan_resources:2236; 2. call to function `pl330_release_channel' immediately after; 3. call to function `dma_pl330_rqcb' in line 1753; 4. spin_lock_irqsave(pch->lock, flags) at dma_pl330_rqcb:1505. I have fixed it as suggested by Marek Szyprowski. First, I have replaced `pch->lock' with `pl330->lock' in functions `pl330_alloc_chan_resources' and `pl330_free_chan_resources'. This avoids the double-lock by acquiring a different lock than `dma_pl330_rqcb'. NOTE that, as a result, `pl330_free_chan_resources' executes `list_splice_tail_init' on `pch->work_list' under lock `pl330->lock', whereas in the rest of the code `pch->work_list' is protected by `pch->lock'. I don't know if this may cause race conditions. Similarly `pch->cyclic' is written by `pl330_alloc_chan_resources' under `pl330->lock' but read by `pl330_tx_submit' under `pch->lock'. Second, I have removed locking from `pl330_request_channel' and `pl330_release_channel' functions. Function `pl330_request_channel' is only called from `pl330_alloc_chan_resources', so the lock is already held. Function `pl330_release_channel' is called from `pl330_free_chan_resources', which already holds the lock, and from `pl330_del'. Function `pl330_del' is called in an error path of `pl330_probe' and at the end of `pl330_remove', but I assume that there cannot be concurrent accesses to the protected data at those points. Signed-off-by: Iago Abal <mail@iagoabal.eu> Reviewed-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'sound/pci/hda/hda_jack.c')