/* * OMAP4xxx bandgap registers, bitfields and temperature definitions * * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ * Contact: * Eduardo Valentin * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA * 02110-1301 USA * */ #ifndef __OMAP4XXX_BANDGAP_H #define __OMAP4XXX_BANDGAP_H /** * *** OMAP4430 *** * * Below, in sequence, are the Register definitions, * the bitfields and the temperature definitions for OMAP4430. */ /** * OMAP4430 register definitions * * Registers are defined as offsets. The offsets are * relative to FUSE_OPP_BGAP on 4430. */ /* OMAP4430.FUSE_OPP_BGAP */ #define OMAP4430_FUSE_OPP_BGAP 0x0 /* OMAP4430.TEMP_SENSOR */ #define OMAP4430_TEMP_SENSOR_CTRL_OFFSET 0xCC /** * Register and bit definitions for OMAP4430 * * All the macros bellow define the required bits for * controlling temperature on OMAP4430. Bit defines are * grouped by register. */ /* OMAP4430.TEMP_SENSOR bits */ #define OMAP4430_BGAP_TEMPSOFF_MASK BIT(12) #define OMAP4430_BGAP_TSHUT_MASK BIT(11) #define OMAP4430_SINGLE_MODE_MASK BIT(10) #define OMAP4430_BGAP_TEMP_SENSOR_SOC_MASK BIT(9) #define OMAP4430_BGAP_TEMP_SENSOR_EOCZ_MASK BIT(8) #define OMAP4430_BGAP_TEMP_SENSOR_DTEMP_MASK (0xff << 0) /** * Temperature limits and thresholds for OMAP4430 * * All the macros bellow are definitions for handling the * ADC conversions and representation of temperature limits * and thresholds for OMAP4430. */ /* ADC conversion table limits */ #define OMAP4430_ADC_START_VALUE 0 #define OMAP4430_ADC_END_VALUE 127 /* bandgap clock limits (no control on 4430) */ #define OMAP4430_MAX_FREQ 32768 #define OMAP4430_MIN_FREQ 32768 /* sensor limits */ #define OMAP4430_MIN_TEMP -40000 #define OMAP4430_MAX_TEMP 125000 #define OMAP4430_HYST_VAL 5000 /** * *** OMAP4460 *** Applicable for OMAP4470 * * Below, in sequence, are the Register definitions, * the bitfields and the temperature definitions for OMAP4460. */ /** * OMAP4460 register definitions * * Registers are defined as offsets. The offsets are * relative to FUSE_OPP_BGAP on 4460. */ /* OMAP4460.FUSE_OPP_BGAP */ #define OMAP4460_FUSE_OPP_BGAP 0x0 /* OMAP4460.TEMP_SENSOR */ #define OMAP4460_TEMP_SENSOR_CTRL_OFFSET 0xCC /* OMAP4460.BANDGAP_CTRL */ #define OMAP4460_BGAP_CTRL_OFFSET 0x118 /* OMAP4460.BANDGAP_COUNTER */ #define OMAP4460_BGAP_COUNTER_OFFSET 0x11C /* OMAP4460.BANDGAP_THRESHOLD */ #define OMAP4460_BGAP_THRESHOLD_OFFSET 0x120 /* OMAP4460.TSHUT_THRESHOLD */ #define OMAP4460_BGAP_TSHUT_OFFSET 0x124 /* OMAP4460.BANDGAP_STATUS */ #define OMAP4460_BGAP_STATUS_OFFSET 0x128 /** * Register bitfields for OMAP4460 * * All the macros bellow define the required bits for * controlling temperature on OMAP4460. Bit defines are * grouped by register. */ /* OMAP4460.TEMP_SENSOR bits */ #define OMAP4460_BGAP_TEMPSOFF_MASK BIT(13) #define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK BIT(11) #define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK BIT(10) #define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0) /* OMAP4460.BANDGAP_CTRL bits */ #define OMAP4460_SINGLE_MODE_MASK BIT(31) #define OMAP4460_MASK_HOT_MASK BIT(1) #define OMAP4460_MASK_COLD_MASK BIT(0) /* OMAP4460.BANDGAP_COUNTER bits */ #define OMAP4460_COUNTER_MASK (0xffffff << 0) /* OMAP4460.BANDGAP_THRESHOLD bits */ #define OMAP4460_T_HOT_MASK (0x3ff << 16) #define OMAP4460_T_COLD_MASK (0x3ff << 0) /* OMAP4460.TSHUT_THRESHOLD bits */ #define OMAP4460_TSHUT_HOT_MASK (0x3ff << 16) #define OMAP4460_TSHUT_COLD_MASK (0x3ff << 0) /* OMAP4460.BANDGAP_STATUS bits */ #define OMAP4460_CLEAN_STOP_MASK BIT(3) #define OMAP4460_BGAP_ALERT_MASK BIT(2) #define OMAP4460_HOT_FLAG_MASK BIT(1) #define OMAP4460_COLD_FLAG_MASK BIT(0) /** * Temperature limits and thresholds for OMAP4460 * * All the macros bellow are definitions for handling the * ADC conversions and representation of temperature limits * and thresholds for OMAP4460. */ /* ADC conversion table limits */ #define OMAP4460_ADC_START_VALUE 530 #define OMAP4460_ADC_END_VALUE 932 /* bandgap clock limits */ #define OMAP4460_MAX_FREQ 1500000 #define OMAP4460_MIN_FREQ 1000000 /* sensor limits */ #define OMAP4460_MIN_TEMP -40000 #define OMAP4460_MAX_TEMP 123000 #define OMAP4460_HYST_VAL 5000 /* interrupts thresholds */ #define OMAP4460_TSHUT_HOT 900 /* 122 deg C */ #define OMAP4460_TSHUT_COLD 895 /* 100 deg C */ #define OMAP4460_T_HOT 800 /* 73 deg C */ #define OMAP4460_T_COLD 795 /* 71 deg C */ #endif /* __OMAP4XXX_BANDGAP_H */ a6fbde8f8fed33340b /Documentation/backlight parent2faf962d90ca4c5ee7ba026b7351b1f74500bcdf (diff)parent341a670abd1c086d44e09901f0ebee3dd86a60ba (diff)
Merge tag 'armsoc-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC 64-bit changes from Olof Johansson: "Here's our branch of ARM64 contents for this merge window. Most of this is DT contents for new SoCs (or those who have seen new device support added). Maybe we should stop separating out the arm64 contents here to avoid the kind of internal conflicts as we got this time around, where 32- and 64-bit contents conflicted. Anyhow, on the actual contents: New SoCs: - Broadcom North Star 2 (ns2) - Marvell Berlin4CT - Mediatek MT6795 - Rockchip RK3368 In addition, there are enhancements for the following platforms: - Mediatek MT8173: cpuidle-dt updates, misc other additions - ZyncMP: A bunch of devices added to the existing DTSI - Qualcomm MSM8916 and APQ8016 updates for USB, etc. + a handful of other updates for various platforms" * tag 'armsoc-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (47 commits) ARM64: dts: vexpress: Use assigned-clock-parents for sp810 ARM64: dts: mt6795: enable basic SMP bringup for MT6795 arm64: Enable Marvell Berlin SoC family in defconfig arm64: Enable Marvell Berlin SoC family in Kconfig arm64: dts: Add dts files for Marvell Berlin4CT SoC ARM64: zynqmp: Move SPI nodes to the right location ARM64: zynqmp: Move uart and ttcs to the right location ARM64: zynqmp: Enable spi flashes on ep108 ARM64: zynqmp: Add eeprom memories on i2c bus ARM64: zynqmp: Enable sdhci on ep108 ARM64: zynqmp: Enable watchdog on ep108 ARM64: zynqmp: Add DWC3 usb support ARM64: zynqmp: Add SMMU support ARM64: zynqmp: Add CANs node for platform ARM64: zynqmp: Use zynqmp specific compatible string for gpio devicetree: xilinx: zynqmp: add sata node PCI: iproc: Fix BCMA dependency in Kconfig arm64: dts: Add Broadcom North Star 2 support arm64: Add Broadcom iProc family support PCI: iproc: Fix ARM64 dependency in Kconfig ...
Diffstat (limited to 'Documentation/backlight')