/* * ci_hdrc_pci.c - MIPS USB IP core family device controller * * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved. * * Author: David Lopo * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include #include #include #include #include #include #include /* driver name */ #define UDC_DRIVER_NAME "ci_hdrc_pci" struct ci_hdrc_pci { struct platform_device *ci; struct platform_device *phy; }; /****************************************************************************** * PCI block *****************************************************************************/ static struct ci_hdrc_platform_data pci_platdata = { .name = UDC_DRIVER_NAME, .capoffset = DEF_CAPOFFSET, }; static struct ci_hdrc_platform_data langwell_pci_platdata = { .name = UDC_DRIVER_NAME, .capoffset = 0, }; static struct ci_hdrc_platform_data penwell_pci_platdata = { .name = UDC_DRIVER_NAME, .capoffset = 0, .power_budget = 200, }; /** * ci_hdrc_pci_probe: PCI probe * @pdev: USB device controller being probed * @id: PCI hotplug ID connecting controller to UDC framework * * This function returns an error code * Allocates basic PCI resources for this USB device controller, and then * invokes the udc_probe() method to start the UDC associated with it */ static int ci_hdrc_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct ci_hdrc_platform_data *platdata = (void *)id->driver_data; struct ci_hdrc_pci *ci; struct resource res[3]; int retval = 0, nres = 2; if (!platdata) { dev_err(&pdev->dev, "device doesn't provide driver data\n"); return -ENODEV; } ci = devm_kzalloc(&pdev->dev, sizeof(*ci), GFP_KERNEL); if (!ci) return -ENOMEM; retval = pcim_enable_device(pdev); if (retval) return retval; if (!pdev->irq) { dev_err(&pdev->dev, "No IRQ, check BIOS/PCI setup!"); return -ENODEV; } pci_set_master(pdev); pci_try_set_mwi(pdev); /* register a nop PHY */ ci->phy = usb_phy_generic_register(); if (IS_ERR(ci->phy)) return PTR_ERR(ci->phy); memset(res, 0, sizeof(res)); res[0].start = pci_resource_start(pdev, 0); res[0].end = pci_resource_end(pdev, 0); res[0].flags = IORESOURCE_MEM; res[1].start = pdev->irq; res[1].flags = IORESOURCE_IRQ; ci->ci = ci_hdrc_add_device(&pdev->dev, res, nres, platdata); if (IS_ERR(ci->ci)) { dev_err(&pdev->dev, "ci_hdrc_add_device failed!\n"); usb_phy_generic_unregister(ci->phy); return PTR_ERR(ci->ci); } pci_set_drvdata(pdev, ci); return 0; } /** * ci_hdrc_pci_remove: PCI remove * @pdev: USB Device Controller being removed * * Reverses the effect of ci_hdrc_pci_probe(), * first invoking the udc_remove() and then releases * all PCI resources allocated for this USB device controller */ static void ci_hdrc_pci_remove(struct pci_dev *pdev) { struct ci_hdrc_pci *ci = pci_get_drvdata(pdev); ci_hdrc_remove_device(ci->ci); usb_phy_generic_unregister(ci->phy); } /** * PCI device table * PCI device structure * * Check "pci.h" for details * * Note: ehci-pci driver may try to probe the device first. You have to add an * ID to the bypass_pci_id_table in ehci-pci driver to prevent this. */ static const struct pci_device_id ci_hdrc_pci_id_table[] = { { PCI_DEVICE(0x153F, 0x1004), .driver_data = (kernel_ulong_t)&pci_platdata, }, { PCI_DEVICE(0x153F, 0x1006), .driver_data = (kernel_ulong_t)&pci_platdata, }, { PCI_VDEVICE(INTEL, 0x0811), .driver_data = (kernel_ulong_t)&langwell_pci_platdata, }, { PCI_VDEVICE(INTEL, 0x0829), .driver_data = (kernel_ulong_t)&penwell_pci_platdata, }, { /* Intel Clovertrail */ PCI_VDEVICE(INTEL, 0xe006), .driver_data = (kernel_ulong_t)&penwell_pci_platdata, }, { 0 } /* end: all zeroes */ }; MODULE_DEVICE_TABLE(pci, ci_hdrc_pci_id_table); static struct pci_driver ci_hdrc_pci_driver = { .name = UDC_DRIVER_NAME, .id_table = ci_hdrc_pci_id_table, .probe = ci_hdrc_pci_probe, .remove = ci_hdrc_pci_remove, }; module_pci_driver(ci_hdrc_pci_driver); MODULE_AUTHOR("MIPS - David Lopo "); MODULE_DESCRIPTION("MIPS CI13XXX USB Peripheral Controller"); MODULE_LICENSE("GPL"); MODULE_VERSION("June 2008"); MODULE_ALIAS("platform:ci13xxx_pci"); thorBjorn Helgaas <bhelgaas@google.com>2017-01-27 15:00:45 -0600 committerBjorn Helgaas <bhelgaas@google.com>2017-01-27 15:00:45 -0600 commit030305d69fc6963c16003f50d7e8d74b02d0a143 (patch) tree363a4e34d199178769b7e7eeb26ea2620a55847b /fs/xfs/xfs_discard.c parent4d191b1b63c209e37bf27938ef365244d3c41084 (diff)
PCI/ASPM: Handle PCI-to-PCIe bridges as roots of PCIe hierarchies
In a struct pcie_link_state, link->root points to the pcie_link_state of the root of the PCIe hierarchy. For the topmost link, this points to itself (link->root = link). For others, we copy the pointer from the parent (link->root = link->parent->root). Previously we recognized that Root Ports originated PCIe hierarchies, but we treated PCI/PCI-X to PCIe Bridges as being in the middle of the hierarchy, and when we tried to copy the pointer from link->parent->root, there was no parent, and we dereferenced a NULL pointer: BUG: unable to handle kernel NULL pointer dereference at 0000000000000090 IP: [<ffffffff9e424350>] pcie_aspm_init_link_state+0x170/0x820 Recognize that PCI/PCI-X to PCIe Bridges originate PCIe hierarchies just like Root Ports do, so link->root for these devices should also point to itself. Fixes: 51ebfc92b72b ("PCI: Enumerate switches below PCI-to-PCIe bridges") Link: https://bugzilla.kernel.org/show_bug.cgi?id=193411 Link: https://bugzilla.opensuse.org/show_bug.cgi?id=1022181 Tested-by: lists@ssl-mail.com Tested-by: Jayachandran C. <jnair@caviumnetworks.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v4.2+
Diffstat (limited to 'fs/xfs/xfs_discard.c')