config USB_DWC2
tristate "DesignWare USB2 DRD Core Support"
depends on HAS_DMA
depends on USB || USB_GADGET
depends on HAS_IOMEM
help
Say Y here if your system has a Dual Role Hi-Speed USB
controller based on the DesignWare HSOTG IP Core.
For host mode, if you choose to build the driver as dynamically
linked modules, the core module will be called dwc2.ko, the PCI
bus interface module (if you have a PCI bus system) will be
called dwc2_pci.ko, and the platform interface module (for
controllers directly connected to the CPU) will be called
dwc2_platform.ko. For all modes(host, gadget and dual-role), there
will be an additional module named dwc2.ko.
if USB_DWC2
choice
bool "DWC2 Mode Selection"
default USB_DWC2_DUAL_ROLE if (USB && USB_GADGET)
default USB_DWC2_HOST if (USB && !USB_GADGET)
default USB_DWC2_PERIPHERAL if (!USB && USB_GADGET)
config USB_DWC2_HOST
bool "Host only mode"
depends on USB=y || (USB_DWC2=m && USB)
help
The Designware USB2.0 high-speed host controller
integrated into many SoCs. Select this option if you want the
driver to operate in Host-only mode.
comment "Gadget/Dual-role mode requires USB Gadget support to be enabled"
config USB_DWC2_PERIPHERAL
bool "Gadget only mode"
depends on USB_GADGET=y || USB_GADGET=USB_DWC2
help
The Designware USB2.0 high-speed gadget controller
integrated into many SoCs. Select this option if you want the
driver to operate in Peripheral-only mode. This option requires
USB_GADGET to be enabled.
config USB_DWC2_DUAL_ROLE
bool "Dual Role mode"
depends on (USB=y && USB_GADGET=y) || (USB_DWC2=m && USB && USB_GADGET)
help
Select this option if you want the driver to work in a dual-role
mode. In this mode both host and gadget features are enabled, and
the role will be determined by the cable that gets plugged-in. This
option requires USB_GADGET to be enabled.
endchoice
config USB_DWC2_PCI
tristate "DWC2 PCI"
depends on PCI
depends on USB_GADGET || !USB_GADGET
default n
select NOP_USB_XCEIV
help
The Designware USB2.0 PCI interface module for controllers
connected to a PCI bus.
config USB_DWC2_DEBUG
bool "Enable Debugging Messages"
help
Say Y here to enable debugging messages in the DWC2 Driver.
config USB_DWC2_VERBOSE
bool "Enable Verbose Debugging Messages"
depends on USB_DWC2_DEBUG
help
Say Y here to enable verbose debugging messages in the DWC2 Driver.
WARNING: Enabling this will quickly fill your message log.
If in doubt, say N.
config USB_DWC2_TRACK_MISSED_SOFS
bool "Enable Missed SOF Tracking"
help
Say Y here to enable logging of missed SOF events to the dmesg log.
WARNING: This feature is still experimental.
If in doubt, say N.
config USB_DWC2_DEBUG_PERIODIC
bool "Enable Debugging Messages For Periodic Transfers"
depends on USB_DWC2_DEBUG || USB_DWC2_VERBOSE
default y
help
Say N here to disable (verbose) debugging messages to be
logged for periodic transfers. This allows better debugging of
non-periodic transfers, but of course the debug logs will be
incomplete. Note that this also disables some debug messages
for which the transfer type cannot be deduced.
endif
ux/net-next.git/commit/include/trace/events/writeback.h?id=6e978b22efa1db9f6e71b24440b5f1d93e968ee3'>writeback.h
cpufreq: intel_pstate: Disable energy efficiency optimization
Some Kabylake desktop processors may not reach max turbo when running in
HWP mode, even if running under sustained 100% utilization.
This occurs when the HWP.EPP (Energy Performance Preference) is set to
"balance_power" (0x80) -- the default on most systems.
It occurs because the platform BIOS may erroneously enable an
energy-efficiency setting -- MSR_IA32_POWER_CTL BIT-EE, which is not
recommended to be enabled on this SKU.
On the failing systems, this BIOS issue was not discovered when the
desktop motherboard was tested with Windows, because the BIOS also
neglects to provide the ACPI/CPPC table, that Windows requires to enable
HWP, and so Windows runs in legacy P-state mode, where this setting has
no effect.
Linux' intel_pstate driver does not require ACPI/CPPC to enable HWP, and
so it runs in HWP mode, exposing this incorrect BIOS configuration.
There are several ways to address this problem.
First, Linux can also run in legacy P-state mode on this system.
As intel_pstate is how Linux enables HWP, booting with
"intel_pstate=disable"
will run in acpi-cpufreq/ondemand legacy p-state mode.
Or second, the "performance" governor can be used with intel_pstate,
which will modify HWP.EPP to 0.
Or third, starting in 4.10, the
/sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference
attribute in can be updated from "balance_power" to "performance".
Or fourth, apply this patch, which fixes the erroneous setting of
MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default
configuration to function as designed.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Reviewed-by: Len Brown <len.brown@intel.com>
Cc: 4.6+ <stable@vger.kernel.org> # 4.6+
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>