config USB_DWC3 tristate "DesignWare USB3 DRD Core Support" depends on (USB || USB_GADGET) && HAS_DMA select USB_XHCI_PLATFORM if USB_XHCI_HCD help Say Y or M here if your system has a Dual Role SuperSpeed USB controller based on the DesignWare USB3 IP Core. If you choose to build this driver is a dynamically linked module, the module will be called dwc3.ko. if USB_DWC3 config USB_DWC3_ULPI bool "Register ULPI PHY Interface" depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3 help Select this if you have ULPI type PHY attached to your DWC3 controller. choice bool "DWC3 Mode Selection" default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET) default USB_DWC3_HOST if (USB && !USB_GADGET) default USB_DWC3_GADGET if (!USB && USB_GADGET) config USB_DWC3_HOST bool "Host only mode" depends on USB=y || USB=USB_DWC3 help Select this when you want to use DWC3 in host mode only, thereby the gadget feature will be regressed. config USB_DWC3_GADGET bool "Gadget only mode" depends on USB_GADGET=y || USB_GADGET=USB_DWC3 help Select this when you want to use DWC3 in gadget mode only, thereby the host feature will be regressed. config USB_DWC3_DUAL_ROLE bool "Dual Role mode" depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3)) help This is the default mode of working of DWC3 controller where both host and gadget features are enabled. endchoice comment "Platform Glue Driver Support" config USB_DWC3_OMAP tristate "Texas Instruments OMAP5 and similar Platforms" depends on EXTCON && (ARCH_OMAP2PLUS || COMPILE_TEST) depends on OF default USB_DWC3 help Some platforms from Texas Instruments like OMAP5, DRA7xxx and AM437x use this IP for USB2/3 functionality. Say 'Y' or 'M' here if you have one such device config USB_DWC3_EXYNOS tristate "Samsung Exynos Platform" depends on (ARCH_EXYNOS || COMPILE_TEST) && OF default USB_DWC3 help Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside, say 'Y' or 'M' if you have one such device. config USB_DWC3_PCI tristate "PCIe-based Platforms" depends on PCI && ACPI default USB_DWC3 help If you're using the DesignWare Core IP with a PCIe, please say 'Y' or 'M' here. One such PCIe-based platform is Synopsys' PCIe HAPS model of this IP. config USB_DWC3_KEYSTONE tristate "Texas Instruments Keystone2 Platforms" depends on ARCH_KEYSTONE || COMPILE_TEST default USB_DWC3 help Support of USB2/3 functionality in TI Keystone2 platforms. Say 'Y' or 'M' here if you have one such device config USB_DWC3_OF_SIMPLE tristate "Generic OF Simple Glue Layer" depends on OF && COMMON_CLK default USB_DWC3 help Support USB2/3 functionality in simple SoC integrations. Currently supports Xilinx and Qualcomm DWC USB3 IP. Say 'Y' or 'M' if you have one such device. config USB_DWC3_ST tristate "STMicroelectronics Platforms" depends on (ARCH_STI || COMPILE_TEST) && OF default USB_DWC3 help STMicroelectronics SoCs with one DesignWare Core USB3 IP inside (i.e. STiH407). Say 'Y' or 'M' if you have one such device. endif e='context' onchange='this.form.submit();'>space:mode:
authorHarsh Jain <harsh@chelsio.com>2017-02-01 21:10:28 +0530
committerHerbert Xu <herbert@gondor.apana.org.au>2017-02-03 17:45:48 +0800
commit0b529f143e8baad441a5aac9ad55ec2434d8fb46 (patch)
treefd816e548e12745d4776ad0bd661bec142d3ea06 /net/sunrpc
parentc26819900036f5b91608051a0fc7c76f6b4ffc7b (diff)
crypto: algif_aead - Fix kernel panic on list_del
Kernel panics when userspace program try to access AEAD interface. Remove node from Linked List before freeing its memory. Cc: <stable@vger.kernel.org> Signed-off-by: Harsh Jain <harsh@chelsio.com> Reviewed-by: Stephan Müller <smueller@chronox.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'net/sunrpc')