config USB_DWC3 tristate "DesignWare USB3 DRD Core Support" depends on (USB || USB_GADGET) && HAS_DMA select USB_XHCI_PLATFORM if USB_XHCI_HCD help Say Y or M here if your system has a Dual Role SuperSpeed USB controller based on the DesignWare USB3 IP Core. If you choose to build this driver is a dynamically linked module, the module will be called dwc3.ko. if USB_DWC3 config USB_DWC3_ULPI bool "Register ULPI PHY Interface" depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3 help Select this if you have ULPI type PHY attached to your DWC3 controller. choice bool "DWC3 Mode Selection" default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET) default USB_DWC3_HOST if (USB && !USB_GADGET) default USB_DWC3_GADGET if (!USB && USB_GADGET) config USB_DWC3_HOST bool "Host only mode" depends on USB=y || USB=USB_DWC3 help Select this when you want to use DWC3 in host mode only, thereby the gadget feature will be regressed. config USB_DWC3_GADGET bool "Gadget only mode" depends on USB_GADGET=y || USB_GADGET=USB_DWC3 help Select this when you want to use DWC3 in gadget mode only, thereby the host feature will be regressed. config USB_DWC3_DUAL_ROLE bool "Dual Role mode" depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3)) help This is the default mode of working of DWC3 controller where both host and gadget features are enabled. endchoice comment "Platform Glue Driver Support" config USB_DWC3_OMAP tristate "Texas Instruments OMAP5 and similar Platforms" depends on EXTCON && (ARCH_OMAP2PLUS || COMPILE_TEST) depends on OF default USB_DWC3 help Some platforms from Texas Instruments like OMAP5, DRA7xxx and AM437x use this IP for USB2/3 functionality. Say 'Y' or 'M' here if you have one such device config USB_DWC3_EXYNOS tristate "Samsung Exynos Platform" depends on (ARCH_EXYNOS || COMPILE_TEST) && OF default USB_DWC3 help Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside, say 'Y' or 'M' if you have one such device. config USB_DWC3_PCI tristate "PCIe-based Platforms" depends on PCI && ACPI default USB_DWC3 help If you're using the DesignWare Core IP with a PCIe, please say 'Y' or 'M' here. One such PCIe-based platform is Synopsys' PCIe HAPS model of this IP. config USB_DWC3_KEYSTONE tristate "Texas Instruments Keystone2 Platforms" depends on ARCH_KEYSTONE || COMPILE_TEST default USB_DWC3 help Support of USB2/3 functionality in TI Keystone2 platforms. Say 'Y' or 'M' here if you have one such device config USB_DWC3_OF_SIMPLE tristate "Generic OF Simple Glue Layer" depends on OF && COMMON_CLK default USB_DWC3 help Support USB2/3 functionality in simple SoC integrations. Currently supports Xilinx and Qualcomm DWC USB3 IP. Say 'Y' or 'M' if you have one such device. config USB_DWC3_ST tristate "STMicroelectronics Platforms" depends on (ARCH_STI || COMPILE_TEST) && OF default USB_DWC3 help STMicroelectronics SoCs with one DesignWare Core USB3 IP inside (i.e. STiH407). Say 'Y' or 'M' if you have one such device. endif xt.git/commit/include/dt-bindings/reset?id=1372cef1c697d8aac0cc923f8aa2c37d790ec9ed'>reset/sun8i-h3-ccu.h
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authorMark Rutland <mark.rutland@arm.com>2017-01-25 19:30:09 +0000
committerMark Brown <broonie@kernel.org>2017-01-25 21:05:37 +0000
commit1372cef1c697d8aac0cc923f8aa2c37d790ec9ed (patch)
treeed5f350cd559bc15ae370f0c9fd280204e98597d /include/dt-bindings/reset/sun8i-h3-ccu.h
parentd00b74613fb18dfd0a5aa99270ee2e72d5c808d7 (diff)
regulator: fixed: Revert support for ACPI interface
This reverts commit 13bed58ce874 (regulator: fixed: add support for ACPI interface). While there does appear to be a practical need to manage regulators on ACPI systems, using ad-hoc properties to describe regulators to the kernel presents a number of problems (especially should ACPI gain first class support for such things), and there are ongoing discussions as to how to manage this. Until there is a rough consensus, revert commit 13bed58ce8748d43, which hasn't been in a released kernel yet as discussed in [1] and the surrounding thread. [1] http://lkml.kernel.org/r/20170125184949.x2wkoo7kbaaajkjk@sirena.org.uk Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Lu Baolu <baolu.lu@linux.intel.com> Cc: Mark Brown <broonie@kernel.org> Cc: Rafael J. Wysocki <rafael@kernel.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'include/dt-bindings/reset/sun8i-h3-ccu.h')