/** * io.h - DesignWare USB3 DRD IO Header * * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com * * Authors: Felipe Balbi , * Sebastian Andrzej Siewior * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 of * the License as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef __DRIVERS_USB_DWC3_IO_H #define __DRIVERS_USB_DWC3_IO_H #include #include "trace.h" #include "debug.h" #include "core.h" static inline u32 dwc3_readl(void __iomem *base, u32 offset) { u32 value; /* * We requested the mem region starting from the Globals address * space, see dwc3_probe in core.c. * However, the offsets are given starting from xHCI address space. */ value = readl(base + offset - DWC3_GLOBALS_REGS_START); /* * When tracing we want to make it easy to find the correct address on * documentation, so we revert it back to the proper addresses, the * same way they are described on SNPS documentation */ trace_dwc3_readl(base - DWC3_GLOBALS_REGS_START, offset, value); return value; } static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value) { /* * We requested the mem region starting from the Globals address * space, see dwc3_probe in core.c. * However, the offsets are given starting from xHCI address space. */ writel(value, base + offset - DWC3_GLOBALS_REGS_START); /* * When tracing we want to make it easy to find the correct address on * documentation, so we revert it back to the proper addresses, the * same way they are described on SNPS documentation */ trace_dwc3_writel(base - DWC3_GLOBALS_REGS_START, offset, value); } #endif /* __DRIVERS_USB_DWC3_IO_H */
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authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>2016-12-22 15:00:12 +0000
committerHerbert Xu <herbert@gondor.apana.org.au>2017-02-02 21:54:52 +0800
commit3484ecbe0e9deb94afb0b9b6172d77e98eb72b94 (patch)
tree4d4be0d20d4946c51ef47a882d78c9934a219c0e /include/trace
parent11e3b725cfc282efe9d4a354153e99d86a16af08 (diff)
crypto: qat - fix bar discovery for c62x
Some accelerators of the c62x series have only two bars. This patch skips BAR0 if the accelerator does not have it. Cc: <stable@vger.kernel.org> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'include/trace')