#ifndef _ISP1760_HCD_H_ #define _ISP1760_HCD_H_ #include struct isp1760_qh; struct isp1760_qtd; struct resource; struct usb_hcd; /* * 60kb divided in: * - 32 blocks @ 256 bytes * - 20 blocks @ 1024 bytes * - 4 blocks @ 8192 bytes */ #define BLOCK_1_NUM 32 #define BLOCK_2_NUM 20 #define BLOCK_3_NUM 4 #define BLOCK_1_SIZE 256 #define BLOCK_2_SIZE 1024 #define BLOCK_3_SIZE 8192 #define BLOCKS (BLOCK_1_NUM + BLOCK_2_NUM + BLOCK_3_NUM) #define MAX_PAYLOAD_SIZE BLOCK_3_SIZE #define PAYLOAD_AREA_SIZE 0xf000 struct isp1760_slotinfo { struct isp1760_qh *qh; struct isp1760_qtd *qtd; unsigned long timestamp; }; /* chip memory management */ struct isp1760_memory_chunk { unsigned int start; unsigned int size; unsigned int free; }; enum isp1760_queue_head_types { QH_CONTROL, QH_BULK, QH_INTERRUPT, QH_END }; struct isp1760_hcd { #ifdef CONFIG_USB_ISP1760_HCD struct usb_hcd *hcd; u32 hcs_params; spinlock_t lock; struct isp1760_slotinfo atl_slots[32]; int atl_done_map; struct isp1760_slotinfo int_slots[32]; int int_done_map; struct isp1760_memory_chunk memory_pool[BLOCKS]; struct list_head qh_list[QH_END]; /* periodic schedule support */ #define DEFAULT_I_TDPS 1024 unsigned periodic_size; unsigned i_thresh; unsigned long reset_done; unsigned long next_statechange; #endif }; #ifdef CONFIG_USB_ISP1760_HCD int isp1760_hcd_register(struct isp1760_hcd *priv, void __iomem *regs, struct resource *mem, int irq, unsigned long irqflags, struct device *dev); void isp1760_hcd_unregister(struct isp1760_hcd *priv); int isp1760_init_kmem_once(void); void isp1760_deinit_kmem_cache(void); #else static inline int isp1760_hcd_register(struct isp1760_hcd *priv, void __iomem *regs, struct resource *mem, int irq, unsigned long irqflags, struct device *dev) { return 0; } static inline void isp1760_hcd_unregister(struct isp1760_hcd *priv) { } static inline int isp1760_init_kmem_once(void) { return 0; } static inline void isp1760_deinit_kmem_cache(void) { } #endif #endif /* _ISP1760_HCD_H_ */ cc0ae5b42828785b589f686725ff5bc3b9b25'>diff
path: root/include/soc/tegra/bpmp-abi.h
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authorThomas Gleixner <tglx@linutronix.de>2017-01-31 09:37:34 +0100
committerThomas Gleixner <tglx@linutronix.de>2017-01-31 21:47:58 +0100
commit0becc0ae5b42828785b589f686725ff5bc3b9b25 (patch)
treebe6d0e1f37c38ed0a7dd5da2d4b1e93f0fb43101 /include/soc/tegra/bpmp-abi.h
parent24c2503255d35c269b67162c397a1a1c1e02f6ce (diff)
x86/mce: Make timer handling more robust
Erik reported that on a preproduction hardware a CMCI storm triggers the BUG_ON in add_timer_on(). The reason is that the per CPU MCE timer is started by the CMCI logic before the MCE CPU hotplug callback starts the timer with add_timer_on(). So the timer is already queued which triggers the BUG. Using add_timer_on() is pretty pointless in this code because the timer is strictlty per CPU, initialized as pinned and all operations which arm the timer happen on the CPU to which the timer belongs. Simplify the whole machinery by using mod_timer() instead of add_timer_on() which avoids the problem because mod_timer() can handle already queued timers. Use __start_timer() everywhere so the earliest armed expiry time is preserved. Reported-by: Erik Veijola <erik.veijola@intel.com> Tested-by: Borislav Petkov <bp@alien8.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Borislav Petkov <bp@alien8.de> Cc: Tony Luck <tony.luck@intel.com> Link: http://lkml.kernel.org/r/alpine.DEB.2.20.1701310936080.3457@nanos Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/soc/tegra/bpmp-abi.h')