# # USB Dual Role (OTG-ready) Controller Drivers # for silicon based on Mentor Graphics INVENTRA designs # # (M)HDRC = (Multipoint) Highspeed Dual-Role Controller config USB_MUSB_HDRC tristate 'Inventra Highspeed Dual Role Controller (TI, ADI, AW, ...)' depends on (USB || USB_GADGET) depends on HAS_IOMEM help Say Y here if your system has a dual role high speed USB controller based on the Mentor Graphics silicon IP. Then configure options to match your silicon and the board it's being used with, including the USB peripheral role, or the USB host role, or both. Texas Instruments families using this IP include DaVinci (35x, 644x ...), OMAP 243x, OMAP 3, and TUSB 6010. Analog Devices parts using this IP include Blackfin BF54x, BF525 and BF527. Allwinner SoCs using this IP include A10, A13, A20, ... If you do not know what this is, please say N. To compile this driver as a module, choose M here; the module will be called "musb-hdrc". if USB_MUSB_HDRC choice bool "MUSB Mode Selection" default USB_MUSB_DUAL_ROLE if (USB && USB_GADGET) default USB_MUSB_HOST if (USB && !USB_GADGET) default USB_MUSB_GADGET if (!USB && USB_GADGET) config USB_MUSB_HOST bool "Host only mode" depends on USB=y || USB=USB_MUSB_HDRC help Select this when you want to use MUSB in host mode only, thereby the gadget feature will be regressed. config USB_MUSB_GADGET bool "Gadget only mode" depends on USB_GADGET=y || USB_GADGET=USB_MUSB_HDRC depends on HAS_DMA help Select this when you want to use MUSB in gadget mode only, thereby the host feature will be regressed. config USB_MUSB_DUAL_ROLE bool "Dual Role mode" depends on ((USB=y || USB=USB_MUSB_HDRC) && (USB_GADGET=y || USB_GADGET=USB_MUSB_HDRC)) depends on HAS_DMA help This is the default mode of working of MUSB controller where both host and gadget features are enabled. endchoice comment "Platform Glue Layer" config USB_MUSB_SUNXI tristate "Allwinner (sunxi)" depends on ARCH_SUNXI depends on NOP_USB_XCEIV depends on PHY_SUN4I_USB depends on EXTCON depends on GENERIC_PHY select SUNXI_SRAM config USB_MUSB_DAVINCI tristate "DaVinci" depends on ARCH_DAVINCI_DMx depends on NOP_USB_XCEIV depends on BROKEN config USB_MUSB_DA8XX tristate "DA8xx/OMAP-L1x" depends on ARCH_DAVINCI_DA8XX depends on NOP_USB_XCEIV select PHY_DA8XX_USB config USB_MUSB_TUSB6010 tristate "TUSB6010" depends on HAS_IOMEM depends on (ARCH_OMAP2PLUS || COMPILE_TEST) && !BLACKFIN depends on NOP_USB_XCEIV = USB_MUSB_HDRC # both built-in or both modules config USB_MUSB_OMAP2PLUS tristate "OMAP2430 and onwards" depends on ARCH_OMAP2PLUS && USB depends on OMAP_CONTROL_PHY || !OMAP_CONTROL_PHY select GENERIC_PHY config USB_MUSB_AM35X tristate "AM35x" depends on ARCH_OMAP depends on NOP_USB_XCEIV config USB_MUSB_DSPS tristate "TI DSPS platforms" select USB_MUSB_AM335X_CHILD depends on ARCH_OMAP2PLUS || COMPILE_TEST depends on OF_IRQ config USB_MUSB_BLACKFIN tristate "Blackfin" depends on (BF54x && !BF544) || (BF52x && ! BF522 && !BF523) depends on NOP_USB_XCEIV config USB_MUSB_UX500 tristate "Ux500 platforms" depends on ARCH_U8500 || COMPILE_TEST config USB_MUSB_JZ4740 tristate "JZ4740" depends on NOP_USB_XCEIV depends on MACH_JZ4740 || COMPILE_TEST depends on USB_MUSB_GADGET depends on USB_OTG_BLACKLIST_HUB config USB_MUSB_AM335X_CHILD tristate comment "MUSB DMA mode" config MUSB_PIO_ONLY bool 'Disable DMA (always use PIO)' help All data is copied between memory and FIFO by the CPU. DMA controllers are ignored. Do not choose this unless DMA support for your SOC or board is unavailable (or unstable). When DMA is enabled at compile time, you can still disable it at run time using the "use_dma=n" module parameter. if !MUSB_PIO_ONLY config USB_UX500_DMA bool 'ST Ericsson Ux500' depends on USB_MUSB_UX500 help Enable DMA transfers on UX500 platforms. config USB_INVENTRA_DMA bool 'Inventra' depends on USB_MUSB_OMAP2PLUS || USB_MUSB_BLACKFIN help Enable DMA transfers using Mentor's engine. config USB_TI_CPPI_DMA bool 'TI CPPI (Davinci)' depends on USB_MUSB_DAVINCI help Enable DMA transfers when TI CPPI DMA is available. config USB_TI_CPPI41_DMA bool 'TI CPPI 4.1 (AM335x)' depends on ARCH_OMAP && DMADEVICES select TI_CPPI41 config USB_TUSB_OMAP_DMA bool 'TUSB 6010' depends on USB_MUSB_TUSB6010 = USB_MUSB_HDRC # both built-in or both modules depends on ARCH_OMAP help Enable DMA transfers on TUSB 6010 when OMAP DMA is available. endif # !MUSB_PIO_ONLY endif # USB_MUSB_HDRC /tr>
authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>2017-02-03 14:18:39 -0800
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2017-02-04 00:11:08 +0100
commit6e978b22efa1db9f6e71b24440b5f1d93e968ee3 (patch)
treec666f7a26b860674848949e39a610222b0723f89 /include/net/irda/af_irda.h
parent3c223c19aea85d3dda1416c187915f4a30b04b1f (diff)
cpufreq: intel_pstate: Disable energy efficiency optimization
Some Kabylake desktop processors may not reach max turbo when running in HWP mode, even if running under sustained 100% utilization. This occurs when the HWP.EPP (Energy Performance Preference) is set to "balance_power" (0x80) -- the default on most systems. It occurs because the platform BIOS may erroneously enable an energy-efficiency setting -- MSR_IA32_POWER_CTL BIT-EE, which is not recommended to be enabled on this SKU. On the failing systems, this BIOS issue was not discovered when the desktop motherboard was tested with Windows, because the BIOS also neglects to provide the ACPI/CPPC table, that Windows requires to enable HWP, and so Windows runs in legacy P-state mode, where this setting has no effect. Linux' intel_pstate driver does not require ACPI/CPPC to enable HWP, and so it runs in HWP mode, exposing this incorrect BIOS configuration. There are several ways to address this problem. First, Linux can also run in legacy P-state mode on this system. As intel_pstate is how Linux enables HWP, booting with "intel_pstate=disable" will run in acpi-cpufreq/ondemand legacy p-state mode. Or second, the "performance" governor can be used with intel_pstate, which will modify HWP.EPP to 0. Or third, starting in 4.10, the /sys/devices/system/cpu/cpufreq/policy*/energy_performance_preference attribute in can be updated from "balance_power" to "performance". Or fourth, apply this patch, which fixes the erroneous setting of MSR_IA32_POWER_CTL BIT_EE on this model, allowing the default configuration to function as designed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Cc: 4.6+ <stable@vger.kernel.org> # 4.6+ Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'include/net/irda/af_irda.h')