/* * Copyright (C) 2011 Google, Inc. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and * may be copied, distributed, and modified under those terms. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * */ #include #include #include #include #include #include #define ULPI_VIEW_WAKEUP (1 << 31) #define ULPI_VIEW_RUN (1 << 30) #define ULPI_VIEW_WRITE (1 << 29) #define ULPI_VIEW_READ (0 << 29) #define ULPI_VIEW_ADDR(x) (((x) & 0xff) << 16) #define ULPI_VIEW_DATA_READ(x) (((x) >> 8) & 0xff) #define ULPI_VIEW_DATA_WRITE(x) ((x) & 0xff) static int ulpi_viewport_wait(void __iomem *view, u32 mask) { unsigned long usec = 2000; while (usec--) { if (!(readl(view) & mask)) return 0; udelay(1); } return -ETIMEDOUT; } static int ulpi_viewport_read(struct usb_phy *otg, u32 reg) { int ret; void __iomem *view = otg->io_priv; writel(ULPI_VIEW_WAKEUP | ULPI_VIEW_WRITE, view); ret = ulpi_viewport_wait(view, ULPI_VIEW_WAKEUP); if (ret) return ret; writel(ULPI_VIEW_RUN | ULPI_VIEW_READ | ULPI_VIEW_ADDR(reg), view); ret = ulpi_viewport_wait(view, ULPI_VIEW_RUN); if (ret) return ret; return ULPI_VIEW_DATA_READ(readl(view)); } static int ulpi_viewport_write(struct usb_phy *otg, u32 val, u32 reg) { int ret; void __iomem *view = otg->io_priv; writel(ULPI_VIEW_WAKEUP | ULPI_VIEW_WRITE, view); ret = ulpi_viewport_wait(view, ULPI_VIEW_WAKEUP); if (ret) return ret; writel(ULPI_VIEW_RUN | ULPI_VIEW_WRITE | ULPI_VIEW_DATA_WRITE(val) | ULPI_VIEW_ADDR(reg), view); return ulpi_viewport_wait(view, ULPI_VIEW_RUN); } struct usb_phy_io_ops ulpi_viewport_access_ops = { .read = ulpi_viewport_read, .write = ulpi_viewport_write, }; EXPORT_SYMBOL_GPL(ulpi_viewport_access_ops); 73827f1c2130d'>commitdiff
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authorThomas Gleixner <tglx@linutronix.de>2016-11-29 14:06:00 +0100
committerThomas Gleixner <tglx@linutronix.de>2016-11-29 14:06:00 +0100
commit2cae3a1ed36ded9b4c8859feeea73827f1c2130d (patch)
tree0c8ac90f545a9c44c5199aa605e5b65d78bf07dd /include/dt-bindings/clock/imx21-clock.h
parent4e201566402c878a225d4425df8a4a664c6f251e (diff)
parent8328255ff81ed422847b443f81b689366e98ce95 (diff)
Merge tag 'irqchip-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates for 4.10 from Marc Zyngier: - xylinx interrupt controller made architecture agnostic (microblaze, ppc, mips) - GICv3 ITS now supported on 32bit ARM (mostly useful for virtual machines) - Some arm64 GICv3 cleanups
Diffstat (limited to 'include/dt-bindings/clock/imx21-clock.h')