#ifndef CARMINE_CARMINE_H #define CARMINE_CARMINE_H #define CARMINE_MEMORY_BAR 2 #define CARMINE_CONFIG_BAR 3 #define MAX_DISPLAY 2 #define CARMINE_DISPLAY_MEM (800 * 600 * 4) #define CARMINE_TOTAL_DIPLAY_MEM (CARMINE_DISPLAY_MEM * MAX_DISPLAY) #define CARMINE_USE_DISPLAY0 (1 << 0) #define CARMINE_USE_DISPLAY1 (1 << 1) /* * This values work on the eval card. Custom boards may use different timings, * here an example :) */ /* DRAM initialization values */ #ifdef CONFIG_FB_CARMINE_DRAM_EVAL #define CARMINE_DFLT_IP_CLOCK_ENABLE (0x03ff) #define CARMINE_DFLT_IP_DCTL_ADD (0x05c3) #define CARMINE_DFLT_IP_DCTL_MODE (0x0121) #define CARMINE_DFLT_IP_DCTL_EMODE (0x8000) #define CARMINE_DFLT_IP_DCTL_SET_TIME1 (0x4749) #define CARMINE_DFLT_IP_DCTL_SET_TIME2 (0x2a22) #define CARMINE_DFLT_IP_DCTL_REFRESH (0x0042) #define CARMINE_DFLT_IP_DCTL_STATES (0x0003) #define CARMINE_DFLT_IP_DCTL_RESERVE0 (0x0020) #define CARMINE_DFLT_IP_DCTL_FIFO_DEPTH (0x000f) #define CARMINE_DFLT_IP_DCTL_RESERVE2 (0x0000) #define CARMINE_DFLT_IP_DCTL_DDRIF1 (0x6646) #define CARMINE_DFLT_IP_DCTL_DDRIF2 (0x0055) #define CARMINE_DFLT_IP_DCTL_MODE_AFT_RST (0x0021) #define CARMINE_DFLT_IP_DCTL_STATES_AFT_RST (0x0002) #define CARMINE_DFLT_IP_DCTL_IO_CONT0 (0x0555) #define CARMINE_DFLT_IP_DCTL_IO_CONT1 (0x0555) #define CARMINE_DCTL_DLL_RESET (1) #endif #ifdef CONFIG_CARMINE_DRAM_CUSTOM #define CARMINE_DFLT_IP_CLOCK_ENABLE (0x03ff) #define CARMINE_DFLT_IP_DCTL_ADD (0x03b2) #define CARMINE_DFLT_IP_DCTL_MODE (0x0161) #define CARMINE_DFLT_IP_DCTL_EMODE (0x8000) #define CARMINE_DFLT_IP_DCTL_SET_TIME1 (0x2628) #define CARMINE_DFLT_IP_DCTL_SET_TIME2 (0x1a09) #define CARMINE_DFLT_IP_DCTL_REFRESH (0x00fe) #define CARMINE_DFLT_IP_DCTL_STATES (0x0003) #define CARMINE_DFLT_IP_DCTL_RESERVE0 (0x0020) #define CARMINE_DFLT_IP_DCTL_FIFO_DEPTH (0x000f) #define CARMINE_DFLT_IP_DCTL_RESERVE2 (0x0000) #define CARMINE_DFLT_IP_DCTL_DDRIF1 (0x0646) #define CARMINE_DFLT_IP_DCTL_DDRIF2 (0x55aa) #define CARMINE_DFLT_IP_DCTL_MODE_AFT_RST (0x0061) #define CARMINE_DFLT_IP_DCTL_STATES_AFT_RST (0x0002) #define CARMINE_DFLT_IP_DCTL_IO_CONT0 (0x0555) #define CARMINE_DFLT_IP_DCTL_IO_CONT1 (0x0555) #define CARMINE_DCTL_DLL_RESET (1) #endif #endif 7df2443cd5f67fc6ee7c05a88e4996e8177f91b'>diff
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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2017-02-03 17:10:28 +1100
committerMichael Ellerman <mpe@ellerman.id.au>2017-02-08 23:36:29 +1100
commitd7df2443cd5f67fc6ee7c05a88e4996e8177f91b (patch)
tree098a7c0ca4fceb8a65cb1f693c9d71990388933d /include/net/switchdev.h
parenta0615a16f7d0ceb5804d295203c302d496d8ee91 (diff)
powerpc/mm: Fix spurrious segfaults on radix with autonuma
When autonuma (Automatic NUMA balancing) marks a PTE inaccessible it clears all the protection bits but leave the PTE valid. With the Radix MMU, an attempt at executing from such a PTE will take a fault with bit 35 of SRR1 set "SRR1_ISI_N_OR_G". It is thus incorrect to treat all such faults as errors. We should pass them to handle_mm_fault() for autonuma to deal with. The case of pages that are really not executable is handled by the existing test for VM_EXEC further down. That leaves us with catching the kernel attempts at executing user pages. We can catch that earlier, even before we do find_vma. It is never valid on powerpc for the kernel to take an exec fault to begin with. So fold that test with the existing test for the kernel faulting on kernel addresses to bail out early. Fixes: 1d18ad026844 ("powerpc/mm: Detect instruction fetch denied and report") Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Acked-by: Balbir Singh <bsingharora@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'include/net/switchdev.h')