#ifndef CARMINE_CARMINE_H #define CARMINE_CARMINE_H #define CARMINE_MEMORY_BAR 2 #define CARMINE_CONFIG_BAR 3 #define MAX_DISPLAY 2 #define CARMINE_DISPLAY_MEM (800 * 600 * 4) #define CARMINE_TOTAL_DIPLAY_MEM (CARMINE_DISPLAY_MEM * MAX_DISPLAY) #define CARMINE_USE_DISPLAY0 (1 << 0) #define CARMINE_USE_DISPLAY1 (1 << 1) /* * This values work on the eval card. Custom boards may use different timings, * here an example :) */ /* DRAM initialization values */ #ifdef CONFIG_FB_CARMINE_DRAM_EVAL #define CARMINE_DFLT_IP_CLOCK_ENABLE (0x03ff) #define CARMINE_DFLT_IP_DCTL_ADD (0x05c3) #define CARMINE_DFLT_IP_DCTL_MODE (0x0121) #define CARMINE_DFLT_IP_DCTL_EMODE (0x8000) #define CARMINE_DFLT_IP_DCTL_SET_TIME1 (0x4749) #define CARMINE_DFLT_IP_DCTL_SET_TIME2 (0x2a22) #define CARMINE_DFLT_IP_DCTL_REFRESH (0x0042) #define CARMINE_DFLT_IP_DCTL_STATES (0x0003) #define CARMINE_DFLT_IP_DCTL_RESERVE0 (0x0020) #define CARMINE_DFLT_IP_DCTL_FIFO_DEPTH (0x000f) #define CARMINE_DFLT_IP_DCTL_RESERVE2 (0x0000) #define CARMINE_DFLT_IP_DCTL_DDRIF1 (0x6646) #define CARMINE_DFLT_IP_DCTL_DDRIF2 (0x0055) #define CARMINE_DFLT_IP_DCTL_MODE_AFT_RST (0x0021) #define CARMINE_DFLT_IP_DCTL_STATES_AFT_RST (0x0002) #define CARMINE_DFLT_IP_DCTL_IO_CONT0 (0x0555) #define CARMINE_DFLT_IP_DCTL_IO_CONT1 (0x0555) #define CARMINE_DCTL_DLL_RESET (1) #endif #ifdef CONFIG_CARMINE_DRAM_CUSTOM #define CARMINE_DFLT_IP_CLOCK_ENABLE (0x03ff) #define CARMINE_DFLT_IP_DCTL_ADD (0x03b2) #define CARMINE_DFLT_IP_DCTL_MODE (0x0161) #define CARMINE_DFLT_IP_DCTL_EMODE (0x8000) #define CARMINE_DFLT_IP_DCTL_SET_TIME1 (0x2628) #define CARMINE_DFLT_IP_DCTL_SET_TIME2 (0x1a09) #define CARMINE_DFLT_IP_DCTL_REFRESH (0x00fe) #define CARMINE_DFLT_IP_DCTL_STATES (0x0003) #define CARMINE_DFLT_IP_DCTL_RESERVE0 (0x0020) #define CARMINE_DFLT_IP_DCTL_FIFO_DEPTH (0x000f) #define CARMINE_DFLT_IP_DCTL_RESERVE2 (0x0000) #define CARMINE_DFLT_IP_DCTL_DDRIF1 (0x0646) #define CARMINE_DFLT_IP_DCTL_DDRIF2 (0x55aa) #define CARMINE_DFLT_IP_DCTL_MODE_AFT_RST (0x0061) #define CARMINE_DFLT_IP_DCTL_STATES_AFT_RST (0x0002) #define CARMINE_DFLT_IP_DCTL_IO_CONT0 (0x0555) #define CARMINE_DFLT_IP_DCTL_IO_CONT1 (0x0555) #define CARMINE_DCTL_DLL_RESET (1) #endif #endif
path: root/include/soc/tegra/ahb.h
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authorLinus Torvalds <torvalds@linux-foundation.org>2017-01-24 16:54:39 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2017-01-24 16:54:39 -0800
commit883af14e67e8b8702b5560aa64c888c0cd0bd66c (patch)
tree74e3a6b53f5fad9f7848ab1b9f6921b7012940a4 /include/soc/tegra/ahb.h
parent0263d4ebd94b36280608e296cba39b924b6e832b (diff)
parentaab45453ff5c77200c6da4ac909f7a4392aed17e (diff)
Merge branch 'akpm' (patches from Andrew)
Merge fixes from Andrew Morton: "26 fixes" * emailed patches from Andrew Morton <akpm@linux-foundation.org>: (26 commits) MAINTAINERS: add Dan Streetman to zbud maintainers MAINTAINERS: add Dan Streetman to zswap maintainers mm: do not export ioremap_page_range symbol for external module mn10300: fix build error of missing fpu_save() romfs: use different way to generate fsid for BLOCK or MTD frv: add missing atomic64 operations mm, page_alloc: fix premature OOM when racing with cpuset mems update mm, page_alloc: move cpuset seqcount checking to slowpath mm, page_alloc: fix fast-path race with cpuset update or removal mm, page_alloc: fix check for NULL preferred_zone kernel/panic.c: add missing \n fbdev: color map copying bounds checking frv: add atomic64_add_unless() mm/mempolicy.c: do not put mempolicy before using its nodemask radix-tree: fix private list warnings Documentation/filesystems/proc.txt: add VmPin mm, memcg: do not retry precharge charges proc: add a schedule point in proc_pid_readdir() mm: alloc_contig: re-allow CMA to compact FS pages mm/slub.c: trace free objects at KERN_INFO ...
Diffstat (limited to 'include/soc/tegra/ahb.h')