/* * linux/drivers/video/nvidia/nvidia-i2c.c - nVidia i2c * * Copyright 2004 Antonino A. Daplas * * Based on rivafb-i2c.c * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive * for more details. */ #include #include #include #include #include #include #include #include "nv_type.h" #include "nv_local.h" #include "nv_proto.h" #include "../edid.h" static void nvidia_gpio_setscl(void *data, int state) { struct nvidia_i2c_chan *chan = data; struct nvidia_par *par = chan->par; u32 val; val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0; if (state) val |= 0x20; else val &= ~0x20; NVWriteCrtc(par, chan->ddc_base + 1, val | 0x01); } static void nvidia_gpio_setsda(void *data, int state) { struct nvidia_i2c_chan *chan = data; struct nvidia_par *par = chan->par; u32 val; val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0; if (state) val |= 0x10; else val &= ~0x10; NVWriteCrtc(par, chan->ddc_base + 1, val | 0x01); } static int nvidia_gpio_getscl(void *data) { struct nvidia_i2c_chan *chan = data; struct nvidia_par *par = chan->par; u32 val = 0; if (NVReadCrtc(par, chan->ddc_base) & 0x04) val = 1; return val; } static int nvidia_gpio_getsda(void *data) { struct nvidia_i2c_chan *chan = data; struct nvidia_par *par = chan->par; u32 val = 0; if (NVReadCrtc(par, chan->ddc_base) & 0x08) val = 1; return val; } static int nvidia_setup_i2c_bus(struct nvidia_i2c_chan *chan, const char *name, unsigned int i2c_class) { int rc; strcpy(chan->adapter.name, name); chan->adapter.owner = THIS_MODULE; chan->adapter.class = i2c_class; chan->adapter.algo_data = &chan->algo; chan->adapter.dev.parent = &chan->par->pci_dev->dev; chan->algo.setsda = nvidia_gpio_setsda; chan->algo.setscl = nvidia_gpio_setscl; chan->algo.getsda = nvidia_gpio_getsda; chan->algo.getscl = nvidia_gpio_getscl; chan->algo.udelay = 40; chan->algo.timeout = msecs_to_jiffies(2); chan->algo.data = chan; i2c_set_adapdata(&chan->adapter, chan); /* Raise SCL and SDA */ nvidia_gpio_setsda(chan, 1); nvidia_gpio_setscl(chan, 1); udelay(20); rc = i2c_bit_add_bus(&chan->adapter); if (rc == 0) dev_dbg(&chan->par->pci_dev->dev, "I2C bus %s registered.\n", name); else { dev_warn(&chan->par->pci_dev->dev, "Failed to register I2C bus %s.\n", name); chan->par = NULL; } return rc; } void nvidia_create_i2c_busses(struct nvidia_par *par) { par->chan[0].par = par; par->chan[1].par = par; par->chan[2].par = par; par->chan[0].ddc_base = (par->reverse_i2c) ? 0x36 : 0x3e; nvidia_setup_i2c_bus(&par->chan[0], "nvidia #0", (par->reverse_i2c) ? I2C_CLASS_HWMON : 0); par->chan[1].ddc_base = (par->reverse_i2c) ? 0x3e : 0x36; nvidia_setup_i2c_bus(&par->chan[1], "nvidia #1", (par->reverse_i2c) ? 0 : I2C_CLASS_HWMON); par->chan[2].ddc_base = 0x50; nvidia_setup_i2c_bus(&par->chan[2], "nvidia #2", 0); } void nvidia_delete_i2c_busses(struct nvidia_par *par) { int i; for (i = 0; i < 3; i++) { if (!par->chan[i].par) continue; i2c_del_adapter(&par->chan[i].adapter); par->chan[i].par = NULL; } } int nvidia_probe_i2c_connector(struct fb_info *info, int conn, u8 **out_edid) { struct nvidia_par *par = info->par; u8 *edid = NULL; if (par->chan[conn - 1].par) edid = fb_ddc_read(&par->chan[conn - 1].adapter); if (!edid && conn == 1) { /* try to get from firmware */ const u8 *e = fb_firmware_edid(info->device); if (e != NULL) edid = kmemdup(e, EDID_LENGTH, GFP_KERNEL); } *out_edid = edid; return (edid) ? 0 : 1; } 2e380d0544f1e7e3249d7bbc45979&showmsg=1'>Expand)AuthorFilesLines '15'>15space:mode:
authorBjorn Helgaas <bhelgaas@google.com>2017-01-27 15:00:45 -0600
committerBjorn Helgaas <bhelgaas@google.com>2017-01-27 15:00:45 -0600
commit030305d69fc6963c16003f50d7e8d74b02d0a143 (patch)
tree363a4e34d199178769b7e7eeb26ea2620a55847b /drivers/usb/host/ehci-mv.c
parent4d191b1b63c209e37bf27938ef365244d3c41084 (diff)
PCI/ASPM: Handle PCI-to-PCIe bridges as roots of PCIe hierarchies
In a struct pcie_link_state, link->root points to the pcie_link_state of the root of the PCIe hierarchy. For the topmost link, this points to itself (link->root = link). For others, we copy the pointer from the parent (link->root = link->parent->root). Previously we recognized that Root Ports originated PCIe hierarchies, but we treated PCI/PCI-X to PCIe Bridges as being in the middle of the hierarchy, and when we tried to copy the pointer from link->parent->root, there was no parent, and we dereferenced a NULL pointer: BUG: unable to handle kernel NULL pointer dereference at 0000000000000090 IP: [<ffffffff9e424350>] pcie_aspm_init_link_state+0x170/0x820 Recognize that PCI/PCI-X to PCIe Bridges originate PCIe hierarchies just like Root Ports do, so link->root for these devices should also point to itself. Fixes: 51ebfc92b72b ("PCI: Enumerate switches below PCI-to-PCIe bridges") Link: https://bugzilla.kernel.org/show_bug.cgi?id=193411 Link: https://bugzilla.opensuse.org/show_bug.cgi?id=1022181 Tested-by: lists@ssl-mail.com Tested-by: Jayachandran C. <jnair@caviumnetworks.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v4.2+
Diffstat (limited to 'drivers/usb/host/ehci-mv.c')