/* * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public * License as published by the Free Software Foundation; * either version 2, or (at your option) any later version. * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even * the implied warranty of MERCHANTABILITY or FITNESS FOR * A PARTICULAR PURPOSE.See the GNU General Public License * for more details. * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include #include #include "global.h" static const struct IODATA common_init_data[] = { /* Index, Mask, Value */ /* Set panel power sequence timing */ {0x10, 0xC0, 0x00}, /* T1: VDD on - Data on. Each increment is 1 ms. (50ms = 031h) */ {0x0B, 0xFF, 0x40}, /* T2: Data on - Backlight on. Each increment is 2 ms. (210ms = 068h) */ {0x0C, 0xFF, 0x31}, /* T3: Backlight off -Data off. Each increment is 2 ms. (210ms = 068h)*/ {0x0D, 0xFF, 0x31}, /* T4: Data off - VDD off. Each increment is 1 ms. (50ms = 031h) */ {0x0E, 0xFF, 0x68}, /* T5: VDD off - VDD on. Each increment is 100 ms. (500ms = 04h) */ {0x0F, 0xFF, 0x68}, /* LVDS output power up */ {0x09, 0xA0, 0xA0}, /* turn on back light */ {0x10, 0x33, 0x13} }; /* Index, Mask, Value */ static const struct IODATA dual_channel_enable_data = {0x08, 0xF0, 0xE0}; static const struct IODATA single_channel_enable_data = {0x08, 0xF0, 0x00}; static const struct IODATA dithering_enable_data = {0x0A, 0x70, 0x50}; static const struct IODATA dithering_disable_data = {0x0A, 0x70, 0x00}; static const struct IODATA vdd_on_data = {0x10, 0x20, 0x20}; static const struct IODATA vdd_off_data = {0x10, 0x20, 0x00}; u8 viafb_gpio_i2c_read_lvds(struct lvds_setting_information *plvds_setting_info, struct lvds_chip_information *plvds_chip_info, u8 index) { u8 data; viafb_i2c_readbyte(plvds_chip_info->i2c_port, plvds_chip_info->lvds_chip_slave_addr, index, &data); return data; } void viafb_gpio_i2c_write_mask_lvds(struct lvds_setting_information *plvds_setting_info, struct lvds_chip_information *plvds_chip_info, struct IODATA io_data) { int index, data; index = io_data.Index; data = viafb_gpio_i2c_read_lvds(plvds_setting_info, plvds_chip_info, index); data = (data & (~io_data.Mask)) | io_data.Data; viafb_i2c_writebyte(plvds_chip_info->i2c_port, plvds_chip_info->lvds_chip_slave_addr, index, data); } void viafb_init_lvds_vt1636(struct lvds_setting_information *plvds_setting_info, struct lvds_chip_information *plvds_chip_info) { int reg_num, i; /* Common settings: */ reg_num = ARRAY_SIZE(common_init_data); for (i = 0; i < reg_num; i++) viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info, common_init_data[i]); /* Input Data Mode Select */ if (plvds_setting_info->device_lcd_dualedge) viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info, dual_channel_enable_data); else viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info, single_channel_enable_data); if (plvds_setting_info->LCDDithering) viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info, dithering_enable_data); else viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info, dithering_disable_data); } void viafb_enable_lvds_vt1636(struct lvds_setting_information *plvds_setting_info, struct lvds_chip_information *plvds_chip_info) { viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info, vdd_on_data); } void viafb_disable_lvds_vt1636(struct lvds_setting_information *plvds_setting_info, struct lvds_chip_information *plvds_chip_info) { viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info, vdd_off_data); } bool viafb_lvds_identify_vt1636(u8 i2c_adapter) { u8 Buffer[2]; DEBUG_MSG(KERN_INFO "viafb_lvds_identify_vt1636.\n"); /* Sense VT1636 LVDS Transmiter */ viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr = VT1636_LVDS_I2C_ADDR; /* Check vendor ID first: */ if (viafb_i2c_readbyte(i2c_adapter, VT1636_LVDS_I2C_ADDR, 0x00, &Buffer[0])) return false; viafb_i2c_readbyte(i2c_adapter, VT1636_LVDS_I2C_ADDR, 0x01, &Buffer[1]); if (!((Buffer[0] == 0x06) && (Buffer[1] == 0x11))) return false; /* Check Chip ID: */ viafb_i2c_readbyte(i2c_adapter, VT1636_LVDS_I2C_ADDR, 0x02, &Buffer[0]); viafb_i2c_readbyte(i2c_adapter, VT1636_LVDS_I2C_ADDR, 0x03, &Buffer[1]); if ((Buffer[0] == 0x45) && (Buffer[1] == 0x33)) { viaparinfo->chip_info->lvds_chip_info.lvds_chip_name = VT1636_LVDS; return true; } return false; } static int get_clk_range_index(u32 Clk) { if (Clk < DPA_CLK_30M) return DPA_CLK_RANGE_30M; else if (Clk < DPA_CLK_50M) return DPA_CLK_RANGE_30_50M; else if (Clk < DPA_CLK_70M) return DPA_CLK_RANGE_50_70M; else if (Clk < DPA_CLK_100M) return DPA_CLK_RANGE_70_100M; else if (Clk < DPA_CLK_150M) return DPA_CLK_RANGE_100_150M; else return DPA_CLK_RANGE_150M; } static void set_dpa_vt1636(struct lvds_setting_information *plvds_setting_info, struct lvds_chip_information *plvds_chip_info, struct VT1636_DPA_SETTING *p_vt1636_dpa_setting) { struct IODATA io_data; io_data.Index = 0x09; io_data.Mask = 0x1F; io_data.Data = p_vt1636_dpa_setting->CLK_SEL_ST1; viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info, io_data); io_data.Index = 0x08; io_data.Mask = 0x0F; io_data.Data = p_vt1636_dpa_setting->CLK_SEL_ST2; viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info, io_data); } void viafb_vt1636_patch_skew_on_vt3324( struct lvds_setting_information *plvds_setting_info, struct lvds_chip_information *plvds_chip_info) { struct VT1636_DPA_SETTING dpa = {0x00, 0x00}, dpa_16x12 = {0x0B, 0x03}, *pdpa; int index; DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3324.\n"); /* Graphics DPA settings: */ index = get_clk_range_index(plvds_setting_info->vclk); viafb_set_dpa_gfx(plvds_chip_info->output_interface, &GFX_DPA_SETTING_TBL_VT3324[index]); /* LVDS Transmitter DPA settings: */ if (plvds_setting_info->lcd_panel_hres == 1600 && plvds_setting_info->lcd_panel_vres == 1200) pdpa = &dpa_16x12; else pdpa = &dpa; set_dpa_vt1636(plvds_setting_info, plvds_chip_info, pdpa); } void viafb_vt1636_patch_skew_on_vt3327( struct lvds_setting_information *plvds_setting_info, struct lvds_chip_information *plvds_chip_info) { struct VT1636_DPA_SETTING dpa = {0x00, 0x00}; int index; DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3327.\n"); /* Graphics DPA settings: */ index = get_clk_range_index(plvds_setting_info->vclk); viafb_set_dpa_gfx(plvds_chip_info->output_interface, &GFX_DPA_SETTING_TBL_VT3327[index]); /* LVDS Transmitter DPA settings: */ set_dpa_vt1636(plvds_setting_info, plvds_chip_info, &dpa); } void viafb_vt1636_patch_skew_on_vt3364( struct lvds_setting_information *plvds_setting_info, struct lvds_chip_information *plvds_chip_info) { int index; DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3364.\n"); /* Graphics DPA settings: */ index = get_clk_range_index(plvds_setting_info->vclk); viafb_set_dpa_gfx(plvds_chip_info->output_interface, &GFX_DPA_SETTING_TBL_VT3364[index]); } fw_state_wait() return value") a race can happen between this cancelation and the firmware fw_state_wait_timeout() being woken up after a state change with which fw_load_abort() as that calls swake_up(). Upon error fw_state_wait_timeout() will also again call fw_load_abort() and trigger a null reference. At first glance we could just fix this with a !buf check on fw_load_abort() before accessing buf->fw_st, however there is a logical issue in having a state machine used for the fallback mechanism and preventing access from it once we abort as its inside the buf (buf->fw_st). The firmware_class.c code is setting the buf to NULL to annotate an abort has occurred. Replace this mechanism by simply using the state check instead. All the other code in place already uses similar checks for aborting as well so no further changes are needed. An oops can be reproduced with the new fw_fallback.sh fallback mechanism cancellation test. Either cancelling the fallback mechanism or the custom fallback mechanism triggers a crash. mcgrof@piggy ~/linux-next/tools/testing/selftests/firmware (git::20170111-fw-fixes)$ sudo ./fw_fallback.sh ./fw_fallback.sh: timeout works ./fw_fallback.sh: firmware comparison works ./fw_fallback.sh: fallback mechanism works [ this then sits here when it is trying the cancellation test ] Kernel log: test_firmware: loading 'nope-test-firmware.bin' misc test_firmware: Direct firmware load for nope-test-firmware.bin failed with error -2 misc test_firmware: Falling back to user helper BUG: unable to handle kernel NULL pointer dereference at 0000000000000038 IP: _request_firmware+0xa27/0xad0 PGD 0 Oops: 0000 [#1] SMP Modules linked in: test_firmware(E) ... etc ... CPU: 1 PID: 1396 Comm: fw_fallback.sh Tainted: G W E 4.10.0-rc3-next-20170111+ #30 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS rel-1.10.1-0-g8891697-prebuilt.qemu-project.org 04/01/2014 task: ffff9740b27f4340 task.stack: ffffbb15c0bc8000 RIP: 0010:_request_firmware+0xa27/0xad0 RSP: 0018:ffffbb15c0bcbd10 EFLAGS: 00010246 RAX: 00000000fffffffe RBX: ffff9740afe5aa80 RCX: 0000000000000000 RDX: ffff9740b27f4340 RSI: 0000000000000283 RDI: 0000000000000000 RBP: ffffbb15c0bcbd90 R08: ffffbb15c0bcbcd8 R09: 0000000000000000 R10: 0000000894a0d4b1 R11: 000000000000008c R12: ffffffffc0312480 R13: 0000000000000005 R14: ffff9740b1c32400 R15: 00000000000003e8 FS: 00007f8604422700(0000) GS:ffff9740bfc80000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 0000000000000038 CR3: 000000012164c000 CR4: 00000000000006e0 Call Trace: request_firmware+0x37/0x50 trigger_request_store+0x79/0xd0 [test_firmware] dev_attr_store+0x18/0x30 sysfs_kf_write+0x37/0x40 kernfs_fop_write+0x110/0x1a0 __vfs_write+0x37/0x160 ? _cond_resched+0x1a/0x50 vfs_write+0xb5/0x1a0 SyS_write+0x55/0xc0 ? trace_do_page_fault+0x37/0xd0 entry_SYSCALL_64_fastpath+0x1e/0xad RIP: 0033:0x7f8603f49620 RSP: 002b:00007fff6287b788 EFLAGS: 00000246 ORIG_RAX: 0000000000000001 RAX: ffffffffffffffda RBX: 000055c307b110a0 RCX: 00007f8603f49620 RDX: 0000000000000016 RSI: 000055c3084d8a90 RDI: 0000000000000001 RBP: 0000000000000016 R08: 000000000000c0ff R09: 000055c3084d6336 R10: 000055c307b108b0 R11: 0000000000000246 R12: 000055c307b13c80 R13: 000055c3084d6320 R14: 0000000000000000 R15: 00007fff6287b950 Code: 9f 64 84 e8 9c 61 fe ff b8 f4 ff ff ff e9 6b f9 ff ff 48 c7 c7 40 6b 8d 84 89 45 a8 e8 43 84 18 00 49 8b be 00 03 00 00 8b 45 a8 <83> 7f 38 02 74 08 e8 6e ec ff ff 8b 45 a8 49 c7 86 00 03 00 00 RIP: _request_firmware+0xa27/0xad0 RSP: ffffbb15c0bcbd10 CR2: 0000000000000038 ---[ end trace 6d94ac339c133e6f ]--- Fixes: 5d47ec02c37e ("firmware: Correct handling of fw_state_wait() return value") Reported-and-Tested-by: Jakub Kicinski <jakub.kicinski@netronome.com> Reported-and-Tested-by: Patrick Bruenn <p.bruenn@beckhoff.com> Reported-by: Chris Wilson <chris@chris-wilson.co.uk> CC: <stable@vger.kernel.org> [3.10+] Signed-off-by: Luis R. Rodriguez <mcgrof@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/crypto/sha3.h')