# # 1-wire bus master configuration # menu "1-wire Bus Masters" config W1_MASTER_MATROX tristate "Matrox G400 transport layer for 1-wire" depends on PCI help Say Y here if you want to communicate with your 1-wire devices using Matrox's G400 GPIO pins. This support is also available as a module. If so, the module will be called matrox_w1. config W1_MASTER_DS2490 tristate "DS2490 USB <-> W1 transport layer for 1-wire" depends on USB help Say Y here if you want to have a driver for DS2490 based USB <-> W1 bridges, for example DS9490*. This support is also available as a module. If so, the module will be called ds2490. config W1_MASTER_DS2482 tristate "Maxim DS2482 I2C to 1-Wire bridge" depends on I2C help If you say yes here you get support for the Maxim DS2482 I2C to 1-Wire bridge. This driver can also be built as a module. If so, the module will be called ds2482. config W1_MASTER_MXC tristate "Freescale MXC 1-wire busmaster" depends on ARCH_MXC || COMPILE_TEST help Say Y here to enable MXC 1-wire host config W1_MASTER_DS1WM tristate "Maxim DS1WM 1-wire busmaster" help Say Y here to enable the DS1WM 1-wire driver, such as that in HP iPAQ devices like h5xxx, h2200, and ASIC3-based like hx4700. config W1_MASTER_GPIO tristate "GPIO 1-wire busmaster" depends on GPIOLIB help Say Y here if you want to communicate with your 1-wire devices using GPIO pins. This driver uses the GPIO API to control the wire. This support is also available as a module. If so, the module will be called w1-gpio. config HDQ_MASTER_OMAP tristate "OMAP HDQ driver" depends on ARCH_OMAP help Say Y here if you want support for the 1-wire or HDQ Interface on an OMAP processor. endmenu et-next.git/log/include/net/codel.h?h=nds-private-remove'>logtreecommitdiff
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authorBjorn Helgaas <bhelgaas@google.com>2017-01-27 15:00:45 -0600
committerBjorn Helgaas <bhelgaas@google.com>2017-01-27 15:00:45 -0600
commit030305d69fc6963c16003f50d7e8d74b02d0a143 (patch)
tree363a4e34d199178769b7e7eeb26ea2620a55847b /include/net/codel.h
parent4d191b1b63c209e37bf27938ef365244d3c41084 (diff)
PCI/ASPM: Handle PCI-to-PCIe bridges as roots of PCIe hierarchies
In a struct pcie_link_state, link->root points to the pcie_link_state of the root of the PCIe hierarchy. For the topmost link, this points to itself (link->root = link). For others, we copy the pointer from the parent (link->root = link->parent->root). Previously we recognized that Root Ports originated PCIe hierarchies, but we treated PCI/PCI-X to PCIe Bridges as being in the middle of the hierarchy, and when we tried to copy the pointer from link->parent->root, there was no parent, and we dereferenced a NULL pointer: BUG: unable to handle kernel NULL pointer dereference at 0000000000000090 IP: [<ffffffff9e424350>] pcie_aspm_init_link_state+0x170/0x820 Recognize that PCI/PCI-X to PCIe Bridges originate PCIe hierarchies just like Root Ports do, so link->root for these devices should also point to itself. Fixes: 51ebfc92b72b ("PCI: Enumerate switches below PCI-to-PCIe bridges") Link: https://bugzilla.kernel.org/show_bug.cgi?id=193411 Link: https://bugzilla.opensuse.org/show_bug.cgi?id=1022181 Tested-by: lists@ssl-mail.com Tested-by: Jayachandran C. <jnair@caviumnetworks.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v4.2+
Diffstat (limited to 'include/net/codel.h')