/* * drivers/char/watchdog/max63xx_wdt.c * * Driver for max63{69,70,71,72,73,74} watchdog timers * * Copyright (C) 2009 Marc Zyngier * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. * * This driver assumes the watchdog pins are memory mapped (as it is * the case for the Arcom Zeus). Should it be connected over GPIOs or * another interface, some abstraction will have to be introduced. */ #include #include #include #include #include #include #include #include #include #include #include #define DEFAULT_HEARTBEAT 60 #define MAX_HEARTBEAT 60 static unsigned int heartbeat = DEFAULT_HEARTBEAT; static bool nowayout = WATCHDOG_NOWAYOUT; /* * Memory mapping: a single byte, 3 first lower bits to select bit 3 * to ping the watchdog. */ #define MAX6369_WDSET (7 << 0) #define MAX6369_WDI (1 << 3) #define MAX6369_WDSET_DISABLED 3 static int nodelay; struct max63xx_wdt { struct watchdog_device wdd; const struct max63xx_timeout *timeout; /* memory mapping */ void __iomem *base; spinlock_t lock; /* WDI and WSET bits write access routines */ void (*ping)(struct max63xx_wdt *wdt); void (*set)(struct max63xx_wdt *wdt, u8 set); }; /* * The timeout values used are actually the absolute minimum the chip * offers. Typical values on my board are slightly over twice as long * (10s setting ends up with a 25s timeout), and can be up to 3 times * the nominal setting (according to the datasheet). So please take * these values with a grain of salt. Same goes for the initial delay * "feature". Only max6373/74 have a few settings without this initial * delay (selected with the "nodelay" parameter). * * I also decided to remove from the tables any timeout smaller than a * second, as it looked completly overkill... */ /* Timeouts in second */ struct max63xx_timeout { const u8 wdset; const u8 tdelay; const u8 twd; }; static const struct max63xx_timeout max6369_table[] = { { 5, 1, 1 }, { 6, 10, 10 }, { 7, 60, 60 }, { }, }; static const struct max63xx_timeout max6371_table[] = { { 6, 60, 3 }, { 7, 60, 60 }, { }, }; static const struct max63xx_timeout max6373_table[] = { { 2, 60, 1 }, { 5, 0, 1 }, { 1, 3, 3 }, { 7, 60, 10 }, { 6, 0, 10 }, { }, }; static struct max63xx_timeout * max63xx_select_timeout(struct max63xx_timeout *table, int value) { while (table->twd) { if (value <= table->twd) { if (nodelay && table->tdelay == 0) return table; if (!nodelay) return table; } table++; } return NULL; } static int max63xx_wdt_ping(struct watchdog_device *wdd) { struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd); wdt->ping(wdt); return 0; } static int max63xx_wdt_start(struct watchdog_device *wdd) { struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd); wdt->set(wdt, wdt->timeout->wdset); /* check for a edge triggered startup */ if (wdt->timeout->tdelay == 0) wdt->ping(wdt); return 0; } static int max63xx_wdt_stop(struct watchdog_device *wdd) { struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd); wdt->set(wdt, MAX6369_WDSET_DISABLED); return 0; } static const struct watchdog_ops max63xx_wdt_ops = { .owner = THIS_MODULE, .start = max63xx_wdt_start, .stop = max63xx_wdt_stop, .ping = max63xx_wdt_ping, }; static const struct watchdog_info max63xx_wdt_info = { .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, .identity = "max63xx Watchdog", }; static void max63xx_mmap_ping(struct max63xx_wdt *wdt) { u8 val; spin_lock(&wdt->lock); val = __raw_readb(wdt->base); __raw_writeb(val | MAX6369_WDI, wdt->base); __raw_writeb(val & ~MAX6369_WDI, wdt->base); spin_unlock(&wdt->lock); } static void max63xx_mmap_set(struct max63xx_wdt *wdt, u8 set) { u8 val; spin_lock(&wdt->lock); val = __raw_readb(wdt->base); val &= ~MAX6369_WDSET; val |= set & MAX6369_WDSET; __raw_writeb(val, wdt->base); spin_unlock(&wdt->lock); } static int max63xx_mmap_init(struct platform_device *p, struct max63xx_wdt *wdt) { struct resource *mem = platform_get_resource(p, IORESOURCE_MEM, 0); wdt->base = devm_ioremap_resource(&p->dev, mem); if (IS_ERR(wdt->base)) return PTR_ERR(wdt->base); spin_lock_init(&wdt->lock); wdt->ping = max63xx_mmap_ping; wdt->set = max63xx_mmap_set; return 0; } static int max63xx_wdt_probe(struct platform_device *pdev) { struct max63xx_wdt *wdt; struct max63xx_timeout *table; int err; wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL); if (!wdt) return -ENOMEM; table = (struct max63xx_timeout *)pdev->id_entry->driver_data; if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT) heartbeat = DEFAULT_HEARTBEAT; wdt->timeout = max63xx_select_timeout(table, heartbeat); if (!wdt->timeout) { dev_err(&pdev->dev, "unable to satisfy %ds heartbeat request\n", heartbeat); return -EINVAL; } err = max63xx_mmap_init(pdev, wdt); if (err) return err; platform_set_drvdata(pdev, &wdt->wdd); watchdog_set_drvdata(&wdt->wdd, wdt); wdt->wdd.parent = &pdev->dev; wdt->wdd.timeout = wdt->timeout->twd; wdt->wdd.info = &max63xx_wdt_info; wdt->wdd.ops = &max63xx_wdt_ops; watchdog_set_nowayout(&wdt->wdd, nowayout); err = watchdog_register_device(&wdt->wdd); if (err) return err; dev_info(&pdev->dev, "using %ds heartbeat with %ds initial delay\n", wdt->timeout->twd, wdt->timeout->tdelay); return 0; } static int max63xx_wdt_remove(struct platform_device *pdev) { struct watchdog_device *wdd = platform_get_drvdata(pdev); watchdog_unregister_device(wdd); return 0; } static const struct platform_device_id max63xx_id_table[] = { { "max6369_wdt", (kernel_ulong_t)max6369_table, }, { "max6370_wdt", (kernel_ulong_t)max6369_table, }, { "max6371_wdt", (kernel_ulong_t)max6371_table, }, { "max6372_wdt", (kernel_ulong_t)max6371_table, }, { "max6373_wdt", (kernel_ulong_t)max6373_table, }, { "max6374_wdt", (kernel_ulong_t)max6373_table, }, { }, }; MODULE_DEVICE_TABLE(platform, max63xx_id_table); static struct platform_driver max63xx_wdt_driver = { .probe = max63xx_wdt_probe, .remove = max63xx_wdt_remove, .id_table = max63xx_id_table, .driver = { .name = "max63xx_wdt", }, }; module_platform_driver(max63xx_wdt_driver); MODULE_AUTHOR("Marc Zyngier "); MODULE_DESCRIPTION("max63xx Watchdog Driver"); module_param(heartbeat, int, 0); MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat period in seconds from 1 to " __MODULE_STRING(MAX_HEARTBEAT) ", default " __MODULE_STRING(DEFAULT_HEARTBEAT)); module_param(nowayout, bool, 0); MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); module_param(nodelay, int, 0); MODULE_PARM_DESC(nodelay, "Force selection of a timeout setting without initial delay " "(max6373/74 only, default=0)"); MODULE_LICENSE("GPL v2"); tion-180 ============================================================================= BUG kmalloc-128 (Tainted: G U ): Object already free ----------------------------------------------------------------------------- Disabling lock debugging due to kernel taint INFO: Allocated in drm_atomic_helper_setup_commit+0x285/0x2f0 [drm_kms_helper] age=0 cpu=3 pid=1529 ___slab_alloc+0x308/0x3b0 __slab_alloc+0xd/0x20 kmem_cache_alloc_trace+0x92/0x1c0 drm_atomic_helper_setup_commit+0x285/0x2f0 [drm_kms_helper] intel_atomic_commit+0x35/0x4f0 [i915] drm_atomic_commit+0x46/0x50 [drm] drm_mode_atomic_ioctl+0x7d4/0xab0 [drm] drm_ioctl+0x2b3/0x490 [drm] do_vfs_ioctl+0x69c/0x700 SyS_ioctl+0x4e/0x80 entry_SYSCALL_64_fastpath+0x13/0x94 INFO: Freed in drm_event_cancel_free+0xa3/0xb0 [drm] age=0 cpu=3 pid=1529 __slab_free+0x48/0x2e0 kfree+0x159/0x1a0 drm_event_cancel_free+0xa3/0xb0 [drm] drm_mode_atomic_ioctl+0x86d/0xab0 [drm] drm_ioctl+0x2b3/0x490 [drm] do_vfs_ioctl+0x69c/0x700 SyS_ioctl+0x4e/0x80 entry_SYSCALL_64_fastpath+0x13/0x94 INFO: Slab 0xffffde1f0997b080 objects=17 used=2 fp=0xffff92fb65ec2578 flags=0x200000000008101 INFO: Object 0xffff92fb65ec2578 @offset=1400 fp=0xffff92fb65ec2ae8 Redzone ffff92fb65ec2570: bb bb bb bb bb bb bb bb ........ Object ffff92fb65ec2578: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec2588: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec2598: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec25a8: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec25b8: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec25c8: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec25d8: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec25e8: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b a5 kkkkkkkkkkkkkkk. Redzone ffff92fb65ec25f8: bb bb bb bb bb bb bb bb ........ Padding ffff92fb65ec2738: 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZ CPU: 3 PID: 180 Comm: kworker/3:2 Tainted: G BU 4.10.0-rc6-patser+ #5039 Hardware name: /NUC5PPYB, BIOS PYBSWCEL.86A.0031.2015.0601.1712 06/01/2015 Workqueue: events intel_atomic_helper_free_state [i915] Call Trace: dump_stack+0x4d/0x6d print_trailer+0x20c/0x220 free_debug_processing+0x1c6/0x330 ? drm_atomic_state_default_clear+0xf7/0x1c0 [drm] __slab_free+0x48/0x2e0 ? drm_atomic_state_default_clear+0xf7/0x1c0 [drm] kfree+0x159/0x1a0 drm_atomic_state_default_clear+0xf7/0x1c0 [drm] ? drm_atomic_state_clear+0x30/0x30 [drm] intel_atomic_state_clear+0xd/0x20 [i915] drm_atomic_state_clear+0x1a/0x30 [drm] __drm_atomic_state_free+0x13/0x60 [drm] intel_atomic_helper_free_state+0x5d/0x70 [i915] process_one_work+0x260/0x4a0 worker_thread+0x2d1/0x4f0 kthread+0x127/0x130 ? process_one_work+0x4a0/0x4a0 ? kthread_stop+0x120/0x120 ret_from_fork+0x29/0x40 FIX kmalloc-128: Object at 0xffff92fb65ec2578 not freed Fixes: 3b24f7d67581 ("drm/atomic: Add struct drm_crtc_commit to track async updates") Fixes: 9626014258a5 ("drm/fence: add in-fences support") Cc: <stable@vger.kernel.org> # v4.8+ Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1485854725-27640-1-git-send-email-maarten.lankhorst@linux.intel.com
Diffstat (limited to 'fs/afs/afs_vl.h')