; Author: Frederik Noring ; ; This file is subject to the terms and conditions of the GNU General Public ; License. See the file COPYING in the main directory of this archive ; for more details. ; DSP56k loader ; Host Interface M_BCR EQU $FFFE ; Port A Bus Control Register M_PBC EQU $FFE0 ; Port B Control Register M_PBDDR EQU $FFE2 ; Port B Data Direction Register M_PBD EQU $FFE4 ; Port B Data Register M_PCC EQU $FFE1 ; Port C Control Register M_PCDDR EQU $FFE3 ; Port C Data Direction Register M_PCD EQU $FFE5 ; Port C Data Register M_HCR EQU $FFE8 ; Host Control Register M_HSR EQU $FFE9 ; Host Status Register M_HRX EQU $FFEB ; Host Receive Data Register M_HTX EQU $FFEB ; Host Transmit Data Register ; SSI, Synchronous Serial Interface M_RX EQU $FFEF ; Serial Receive Data Register M_TX EQU $FFEF ; Serial Transmit Data Register M_CRA EQU $FFEC ; SSI Control Register A M_CRB EQU $FFED ; SSI Control Register B M_SR EQU $FFEE ; SSI Status Register M_TSR EQU $FFEE ; SSI Time Slot Register ; Exception Processing M_IPR EQU $FFFF ; Interrupt Priority Register org P:$0 start jmp <$40 org P:$40 ; ; Zero 16384 DSP X and Y words ; clr A #0,r0 ; clr B #0,r4 ; do #64,<_block1 ; rep #256 ; move A,X:(r0)+ B,Y:(r4)+ ;_block1 ; Zero (32768-512) Program words ; clr A #512,r0 ; do #126,<_block2 ; rep #256 ; move A,P:(r0)+ ;_block2 ; Copy DSP program control move #real,r0 move #upload,r1 do #upload_end-upload,_copy movem P:(r0)+,x0 movem x0,P:(r1)+ _copy movep #4,X:<3,x0 cmp x0,A #>1,x0 jeq <$0 _get_address jclr #0,X:<2,x0 jeq load_X cmp x0,A jeq load_Y load_P do y0,_load_P jclr #0,X:</net/socket.c
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authorThomas Gleixner <tglx@linutronix.de>2017-01-31 09:37:34 +0100
committerThomas Gleixner <tglx@linutronix.de>2017-01-31 21:47:58 +0100
commit0becc0ae5b42828785b589f686725ff5bc3b9b25 (patch)
treebe6d0e1f37c38ed0a7dd5da2d4b1e93f0fb43101 /net/socket.c
parent24c2503255d35c269b67162c397a1a1c1e02f6ce (diff)
x86/mce: Make timer handling more robust
Erik reported that on a preproduction hardware a CMCI storm triggers the BUG_ON in add_timer_on(). The reason is that the per CPU MCE timer is started by the CMCI logic before the MCE CPU hotplug callback starts the timer with add_timer_on(). So the timer is already queued which triggers the BUG. Using add_timer_on() is pretty pointless in this code because the timer is strictlty per CPU, initialized as pinned and all operations which arm the timer happen on the CPU to which the timer belongs. Simplify the whole machinery by using mod_timer() instead of add_timer_on() which avoids the problem because mod_timer() can handle already queued timers. Use __start_timer() everywhere so the earliest armed expiry time is preserved. Reported-by: Erik Veijola <erik.veijola@intel.com> Tested-by: Borislav Petkov <bp@alien8.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Borislav Petkov <bp@alien8.de> Cc: Tony Luck <tony.luck@intel.com> Link: http://lkml.kernel.org/r/alpine.DEB.2.20.1701310936080.3457@nanos Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'net/socket.c')