/*
 * Copyright (c) 2012 Netapp, Inc. All rights reserved.
 */
#include <linux/module.h>
#include <linux/nfs_fs.h>
#include "internal.h"
#include "nfs3_fs.h"
#include "nfs.h"

struct nfs_subversion nfs_v3 = {
	.owner = THIS_MODULE,
	.nfs_fs   = &nfs_fs_type,
	.rpc_vers = &nfs_version3,
	.rpc_ops  = &nfs_v3_clientops,
	.sops     = &nfs_sops,
#ifdef CONFIG_NFS_V3_ACL
	.xattr    = nfs3_xattr_handlers,
#endif
};

static int __init init_nfs_v3(void)
{
	register_nfs_version(&nfs_v3);
	return 0;
}

static void __exit exit_nfs_v3(void)
{
	unregister_nfs_version(&nfs_v3);
}

MODULE_LICENSE("GPL");

module_init(init_nfs_v3);
module_exit(exit_nfs_v3);
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<tr><th>author</th><td>Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;</td><td class='right'>2016-04-19 21:39:22 +0200</td></tr>
<tr><th>committer</th><td>Boris Brezillon &lt;boris.brezillon@free-electrons.com&gt;</td><td class='right'>2016-04-19 21:39:22 +0200</td></tr>
<tr><th>commit</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/commit/?id=4217ff3509f95e12d98729a202ae068709226ad5'>4217ff3509f95e12d98729a202ae068709226ad5</a> (<a href='/cgit.cgi/linux/net-next.git/patch/?id=4217ff3509f95e12d98729a202ae068709226ad5'>patch</a>)</td></tr>
<tr><th>tree</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/tree/?id=4217ff3509f95e12d98729a202ae068709226ad5'>31223517cf21ef6b15b86a65804bbc8b4e2ddcae</a></td></tr>
<tr><th>parent</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/commit/?id=f55532a0c0b8bb6148f4e07853b876ef73bc69ca'>f55532a0c0b8bb6148f4e07853b876ef73bc69ca</a> (<a href='/cgit.cgi/linux/net-next.git/diff/?id=4217ff3509f95e12d98729a202ae068709226ad5&amp;id2=f55532a0c0b8bb6148f4e07853b876ef73bc69ca'>diff</a>)</td></tr><tr><th>parent</th><td colspan='2' class='oid'><a href='/cgit.cgi/linux/net-next.git/commit/?id=10f22ee367c4aff7841da6a83c10445d7d6328d9'>10f22ee367c4aff7841da6a83c10445d7d6328d9</a> (<a href='/cgit.cgi/linux/net-next.git/diff/?id=4217ff3509f95e12d98729a202ae068709226ad5&amp;id2=10f22ee367c4aff7841da6a83c10445d7d6328d9'>diff</a>)</td></tr></table>
<div class='commit-subject'>Merge branch 'for-v4.7/gpmc-mtd-common' of github.com:rogerq/linux into nand/next</div><div class='commit-msg'>Pull NAND/GPMC updates from Roger Quadros:
 "We do a couple of things in this series which result in cleaner device
  tree implementation, faster perfomance and multi-platform support. As
  an added bonus we get to use the GPMC_WAIT pins as GPI/Interrupts.

  - Establish a custom interface between NAND and GPMC driver. This is
    needed because all of the NAND registers sit in the GPMC register
    space.

  - Clean up device tree support so that omap-gpmc IP and the omap2 NAND
    driver can be used on non-OMAP platforms. e.g. Keystone.

  - Implement GPIOCHIP for the GPMC WAITPINS. SoCs can contain 2 to 4 of
    these and most of them would be unused otherwise. It also allows a
    cleaner implementation of NAND Ready pin status for the NAND driver.

  - Implement GPMC IRQ domain to proivde the 2 NAND events and GPMC
    WAITPIN edge interrupts.

  - Implement GPIOlib based NAND ready pin checking for OMAP NAND driver.
    On dra7-evm, Read speed increases from 13768 KiB/ to 17246 KiB/s.
    Write speed was unchanged at 7123 KiB/s."

* 'for-v4.7/gpmc-mtd-common' of github.com:rogerq/linux:
  mtd: nand: omap2: Implement NAND ready using gpiolib
  memory: omap-gpmc: Prevent GPMC_STATUS from being accessed via gpmc_regs
  memory: omap-gpmc: Support WAIT pin edge interrupts
  memory: omap-gpmc: Reserve WAITPIN if needed for WAIT monitoring
  memory: omap-gpmc: Support general purpose input for WAITPINs
  memory: omap-gpmc: Move device tree binding to correct location
  memory: omap-gpmc: Prevent mapping into 1st 16MB
  mtd: nand: omap: Update DT binding documentation
  mtd: nand: omap: Clean up device tree support
  mtd: nand: omap: Copy platform data parameters to omap_nand_info data
  mtd: nand: omap: Switch to using GPMC-NAND ops for writebuffer empty check
  mtd: nand: omap: Use gpmc_omap_get_nand_ops() to get NAND registers
  memory: omap-gpmc: Implement IRQ domain for NAND IRQs
  memory: omap-gpmc: Add GPMC-NAND ops to get writebufferempty status
  memory: omap-gpmc: Introduce GPMC to NAND interface
  ARM: OMAP2+: gpmc: Add gpmc timings and settings to platform data
  ARM: OMAP2+: gpmc: Add platform data
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