#ifndef __ASM_CACHEFLUSH_H #define __ASM_CACHEFLUSH_H /* Keep includes the same across arches. */ #include /* * The cache doesn't need to be flushed when TLB entries change when * the cache is mapped to physical memory, not virtual memory */ #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) #define flush_cache_dup_mm(mm) do { } while (0) #define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 #define flush_dcache_page(page) do { } while (0) #define flush_dcache_mmap_lock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0) #define flush_icache_range(start, end) do { } while (0) #define flush_icache_page(vma,pg) do { } while (0) #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) #define flush_cache_vmap(start, end) do { } while (0) #define flush_cache_vunmap(start, end) do { } while (0) #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ do { \ memcpy(dst, src, len); \ flush_icache_user_range(vma, page, vaddr, len); \ } while (0) #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ memcpy(dst, src, len) #endif /* __ASM_CACHEFLUSH_H */ >packet-loop-back net-next plumbingsTobias Klauser
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authorVenkat Reddy Talla <vreddytalla@nvidia.com>2016-11-17 23:24:36 +0530
committerMark Brown <broonie@kernel.org>2016-11-23 16:27:42 +0000
commit983779235a4d08f94e8cda073200423e0ff01d2e (patch)
tree254b624bd499c14b09d55abaf209ea95f3c860f7 /include/dt-bindings/reset/qcom,mmcc-msm8960.h
parent383d0fca7035a12f1201277d33e8fc87c9d60c9a (diff)
regulator: max77620: add documentation for MPOK property
Adding documentation for maxim,power-ok-control dts property Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'include/dt-bindings/reset/qcom,mmcc-msm8960.h')