#ifndef _ASM_GENERIC_RWSEM_H #define _ASM_GENERIC_RWSEM_H #ifndef _LINUX_RWSEM_H #error "Please don't include directly, use instead." #endif #ifdef __KERNEL__ /* * R/W semaphores originally for PPC using the stuff in lib/rwsem.c. * Adapted largely from include/asm-i386/rwsem.h * by Paul Mackerras . */ /* * the semaphore definition */ #ifdef CONFIG_64BIT # define RWSEM_ACTIVE_MASK 0xffffffffL #else # define RWSEM_ACTIVE_MASK 0x0000ffffL #endif #define RWSEM_UNLOCKED_VALUE 0x00000000L #define RWSEM_ACTIVE_BIAS 0x00000001L #define RWSEM_WAITING_BIAS (-RWSEM_ACTIVE_MASK-1) #define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) /* * lock for reading */ static inline void __down_read(struct rw_semaphore *sem) { if (unlikely(atomic_long_inc_return_acquire((atomic_long_t *)&sem->count) <= 0)) rwsem_down_read_failed(sem); } static inline int __down_read_trylock(struct rw_semaphore *sem) { long tmp; while ((tmp = atomic_long_read(&sem->count)) >= 0) { if (tmp == atomic_long_cmpxchg_acquire(&sem->count, tmp, tmp + RWSEM_ACTIVE_READ_BIAS)) { return 1; } } return 0; } /* * lock for writing */ static inline void __down_write(struct rw_semaphore *sem) { long tmp; tmp = atomic_long_add_return_acquire(RWSEM_ACTIVE_WRITE_BIAS, (atomic_long_t *)&sem->count); if (unlikely(tmp != RWSEM_ACTIVE_WRITE_BIAS)) rwsem_down_write_failed(sem); } static inline int __down_write_killable(struct rw_semaphore *sem) { long tmp; tmp = atomic_long_add_return_acquire(RWSEM_ACTIVE_WRITE_BIAS, (atomic_long_t *)&sem->count); if (unlikely(tmp != RWSEM_ACTIVE_WRITE_BIAS)) if (IS_ERR(rwsem_down_write_failed_killable(sem))) return -EINTR; return 0; } static inline int __down_write_trylock(struct rw_semaphore *sem) { long tmp; tmp = atomic_long_cmpxchg_acquire(&sem->count, RWSEM_UNLOCKED_VALUE, RWSEM_ACTIVE_WRITE_BIAS); return tmp == RWSEM_UNLOCKED_VALUE; } /* * unlock after reading */ static inline void __up_read(struct rw_semaphore *sem) { long tmp; tmp = atomic_long_dec_return_release((atomic_long_t *)&sem->count); if (unlikely(tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0)) rwsem_wake(sem); } /* * unlock after writing */ static inline void __up_write(struct rw_semaphore *sem) { if (unlikely(atomic_long_sub_return_release(RWSEM_ACTIVE_WRITE_BIAS, (atomic_long_t *)&sem->count) < 0)) rwsem_wake(sem); } /* * downgrade write lock to read lock */ static inline void __downgrade_write(struct rw_semaphore *sem) { long tmp; /* * When downgrading from exclusive to shared ownership, * anything inside the write-locked region cannot leak * into the read side. In contrast, anything in the * read-locked region is ok to be re-ordered into the * write side. As such, rely on RELEASE semantics. */ tmp = atomic_long_add_return_release(-RWSEM_WAITING_BIAS, (atomic_long_t *)&sem->count); if (tmp < 0) rwsem_downgrade_wake(sem); } #endif /* __KERNEL__ */ #endif /* _ASM_GENERIC_RWSEM_H */ mit/net/ipv6?h=nds-private-remove&id=d6040764adcb5cb6de1489422411d701c158bb69'>ipv6/ila
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authorSalvatore Benedetto <salvatore.benedetto@intel.com>2017-01-13 11:54:08 +0000
committerHerbert Xu <herbert@gondor.apana.org.au>2017-01-23 22:41:32 +0800
commitd6040764adcb5cb6de1489422411d701c158bb69 (patch)
treeec8f34788bcdeaa9dc8f69c58af4c005d1e49021 /net/ipv6/ila
parent07825f0acd85dd8b7481d5ef0eb024b05364d892 (diff)
crypto: api - Clear CRYPTO_ALG_DEAD bit before registering an alg
Make sure CRYPTO_ALG_DEAD bit is cleared before proceeding with the algorithm registration. This fixes qat-dh registration when driver is restarted Cc: <stable@vger.kernel.org> Signed-off-by: Salvatore Benedetto <salvatore.benedetto@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'net/ipv6/ila')