#ifndef _CRYPTO_XTS_H #define _CRYPTO_XTS_H #include #include #include struct scatterlist; struct blkcipher_desc; #define XTS_BLOCK_SIZE 16 struct xts_crypt_req { be128 *tbuf; unsigned int tbuflen; void *tweak_ctx; void (*tweak_fn)(void *ctx, u8* dst, const u8* src); void *crypt_ctx; void (*crypt_fn)(void *ctx, u8 *blks, unsigned int nbytes); }; #define XTS_TWEAK_CAST(x) ((void (*)(void *, u8*, const u8*))(x)) int xts_crypt(struct blkcipher_desc *desc, struct scatterlist *dst, struct scatterlist *src, unsigned int nbytes, struct xts_crypt_req *req); static inline int xts_check_key(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen) { u32 *flags = &tfm->crt_flags; /* * key consists of keys of equal size concatenated, therefore * the length must be even. */ if (keylen % 2) { *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN; return -EINVAL; } /* ensure that the AES and tweak key are not identical */ if (fips_enabled && !crypto_memneq(key, key + (keylen / 2), keylen / 2)) { *flags |= CRYPTO_TFM_RES_WEAK_KEY; return -EINVAL; } return 0; } static inline int xts_verify_key(struct crypto_skcipher *tfm, const u8 *key, unsigned int keylen) { /* * key consists of keys of equal size concatenated, therefore * the length must be even. */ if (keylen % 2) { crypto_skcipher_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN); return -EINVAL; } /* ensure that the AES and tweak key are not identical */ if ((fips_enabled || crypto_skcipher_get_flags(tfm) & CRYPTO_TFM_REQ_WEAK_KEY) && !crypto_memneq(key, key + (keylen / 2), keylen / 2)) { crypto_skcipher_set_flags(tfm, CRYPTO_TFM_RES_WEAK_KEY); return -EINVAL; } return 0; } #endif /* _CRYPTO_XTS_H */ net/irda/qos.h?id=3484ecbe0e9deb94afb0b9b6172d77e98eb72b94'>treecommitdiff
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authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>2016-12-22 15:00:12 +0000
committerHerbert Xu <herbert@gondor.apana.org.au>2017-02-02 21:54:52 +0800
commit3484ecbe0e9deb94afb0b9b6172d77e98eb72b94 (patch)
tree4d4be0d20d4946c51ef47a882d78c9934a219c0e /include/net/irda/qos.h
parent11e3b725cfc282efe9d4a354153e99d86a16af08 (diff)
crypto: qat - fix bar discovery for c62x
Some accelerators of the c62x series have only two bars. This patch skips BAR0 if the accelerator does not have it. Cc: <stable@vger.kernel.org> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'include/net/irda/qos.h')