/* * BSD LICENSE * * Copyright(c) 2014 Broadcom Corporation. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Broadcom Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef _CLOCK_BCM_CYGNUS_H #define _CLOCK_BCM_CYGNUS_H /* GENPLL clock ID */ #define BCM_CYGNUS_GENPLL 0 #define BCM_CYGNUS_GENPLL_AXI21_CLK 1 #define BCM_CYGNUS_GENPLL_250MHZ_CLK 2 #define BCM_CYGNUS_GENPLL_IHOST_SYS_CLK 3 #define BCM_CYGNUS_GENPLL_ENET_SW_CLK 4 #define BCM_CYGNUS_GENPLL_AUDIO_125_CLK 5 #define BCM_CYGNUS_GENPLL_CAN_CLK 6 /* LCPLL0 clock ID */ #define BCM_CYGNUS_LCPLL0 0 #define BCM_CYGNUS_LCPLL0_PCIE_PHY_REF_CLK 1 #define BCM_CYGNUS_LCPLL0_DDR_PHY_CLK 2 #define BCM_CYGNUS_LCPLL0_SDIO_CLK 3 #define BCM_CYGNUS_LCPLL0_USB_PHY_REF_CLK 4 #define BCM_CYGNUS_LCPLL0_SMART_CARD_CLK 5 #define BCM_CYGNUS_LCPLL0_CH5_UNUSED 6 /* MIPI PLL clock ID */ #define BCM_CYGNUS_MIPIPLL 0 #define BCM_CYGNUS_MIPIPLL_CH0_UNUSED 1 #define BCM_CYGNUS_MIPIPLL_CH1_LCD 2 #define BCM_CYGNUS_MIPIPLL_CH2_V3D 3 #define BCM_CYGNUS_MIPIPLL_CH3_UNUSED 4 #define BCM_CYGNUS_MIPIPLL_CH4_UNUSED 5 #define BCM_CYGNUS_MIPIPLL_CH5_UNUSED 6 /* ASIU clock ID */ #define BCM_CYGNUS_ASIU_KEYPAD_CLK 0 #define BCM_CYGNUS_ASIU_ADC_CLK 1 #define BCM_CYGNUS_ASIU_PWM_CLK 2 /* AUDIO clock ID */ #define BCM_CYGNUS_AUDIOPLL 0 #define BCM_CYGNUS_AUDIOPLL_CH0 1 #define BCM_CYGNUS_AUDIOPLL_CH1 2 #define BCM_CYGNUS_AUDIOPLL_CH2 3 #endif /* _CLOCK_BCM_CYGNUS_H */ emove&id=0a019a28e0ca0af7dc2691d1a9527960b07ad2bb'>net/mac802154/Kconfig
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authorOlof Johansson <olof@lixom.net>2017-01-29 21:00:48 -0800
committerOlof Johansson <olof@lixom.net>2017-01-29 21:00:48 -0800
commit0a019a28e0ca0af7dc2691d1a9527960b07ad2bb (patch)
tree5ee1db9aacacd6af6701fb290e8a294ef3cc2bf2 /net/mac802154/Kconfig
parentec026b5020688a8bde5fae9a69ae3c59b66ba3ae (diff)
parent8413299cb3933dade6186bbee8363f190032107e (diff)
Merge tag 'sti-dt-for-v4.10-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into fixes
STi DT fix: Since v4.10-rc1, xhci is complaining in loop with : [ 801.953836] usb usb6-port1: Cannot enable. Maybe the USB cable is bad? [ 801.960455] xhci-hcd xhci-hcd.0.auto: Cannot set link state. [ 801.966611] usb usb6-port1: cannot disable (err = -32) set property "snps,dis_u3_susphy_quirk" in DT fix it. * tag 'sti-dt-for-v4.10-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti: ARM: dts: STiH407-family: set snps,dis_u3_susphy_quirk Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'net/mac802154/Kconfig')