/* * Copyright (C) 2013 Broadcom Corporation * Copyright 2013 Linaro Limited * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation version 2. * * This program is distributed "as is" WITHOUT ANY WARRANTY of any * kind, whether express or implied; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef _CLOCK_BCM21664_H #define _CLOCK_BCM21664_H /* * This file defines the values used to specify clocks provided by * the clock control units (CCUs) on Broadcom BCM21664 family SoCs. */ /* bcm21664 CCU device tree "compatible" strings */ #define BCM21664_DT_ROOT_CCU_COMPAT "brcm,bcm21664-root-ccu" #define BCM21664_DT_AON_CCU_COMPAT "brcm,bcm21664-aon-ccu" #define BCM21664_DT_MASTER_CCU_COMPAT "brcm,bcm21664-master-ccu" #define BCM21664_DT_SLAVE_CCU_COMPAT "brcm,bcm21664-slave-ccu" /* root CCU clock ids */ #define BCM21664_ROOT_CCU_FRAC_1M 0 #define BCM21664_ROOT_CCU_CLOCK_COUNT 1 /* aon CCU clock ids */ #define BCM21664_AON_CCU_HUB_TIMER 0 #define BCM21664_AON_CCU_CLOCK_COUNT 1 /* master CCU clock ids */ #define BCM21664_MASTER_CCU_SDIO1 0 #define BCM21664_MASTER_CCU_SDIO2 1 #define BCM21664_MASTER_CCU_SDIO3 2 #define BCM21664_MASTER_CCU_SDIO4 3 #define BCM21664_MASTER_CCU_SDIO1_SLEEP 4 #define BCM21664_MASTER_CCU_SDIO2_SLEEP 5 #define BCM21664_MASTER_CCU_SDIO3_SLEEP 6 #define BCM21664_MASTER_CCU_SDIO4_SLEEP 7 #define BCM21664_MASTER_CCU_CLOCK_COUNT 8 /* slave CCU clock ids */ #define BCM21664_SLAVE_CCU_UARTB 0 #define BCM21664_SLAVE_CCU_UARTB2 1 #define BCM21664_SLAVE_CCU_UARTB3 2 #define BCM21664_SLAVE_CCU_BSC1 3 #define BCM21664_SLAVE_CCU_BSC2 4 #define BCM21664_SLAVE_CCU_BSC3 5 #define BCM21664_SLAVE_CCU_BSC4 6 #define BCM21664_SLAVE_CCU_CLOCK_COUNT 7 #endif /* _CLOCK_BCM21664_H */ a143'>treecommitdiff
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authorBjorn Helgaas <bhelgaas@google.com>2017-01-27 15:00:45 -0600
committerBjorn Helgaas <bhelgaas@google.com>2017-01-27 15:00:45 -0600
commit030305d69fc6963c16003f50d7e8d74b02d0a143 (patch)
tree363a4e34d199178769b7e7eeb26ea2620a55847b /tools/perf/scripts/perl/bin/failed-syscalls-report
parent4d191b1b63c209e37bf27938ef365244d3c41084 (diff)
PCI/ASPM: Handle PCI-to-PCIe bridges as roots of PCIe hierarchies
In a struct pcie_link_state, link->root points to the pcie_link_state of the root of the PCIe hierarchy. For the topmost link, this points to itself (link->root = link). For others, we copy the pointer from the parent (link->root = link->parent->root). Previously we recognized that Root Ports originated PCIe hierarchies, but we treated PCI/PCI-X to PCIe Bridges as being in the middle of the hierarchy, and when we tried to copy the pointer from link->parent->root, there was no parent, and we dereferenced a NULL pointer: BUG: unable to handle kernel NULL pointer dereference at 0000000000000090 IP: [<ffffffff9e424350>] pcie_aspm_init_link_state+0x170/0x820 Recognize that PCI/PCI-X to PCIe Bridges originate PCIe hierarchies just like Root Ports do, so link->root for these devices should also point to itself. Fixes: 51ebfc92b72b ("PCI: Enumerate switches below PCI-to-PCIe bridges") Link: https://bugzilla.kernel.org/show_bug.cgi?id=193411 Link: https://bugzilla.opensuse.org/show_bug.cgi?id=1022181 Tested-by: lists@ssl-mail.com Tested-by: Jayachandran C. <jnair@caviumnetworks.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: stable@vger.kernel.org # v4.2+
Diffstat (limited to 'tools/perf/scripts/perl/bin/failed-syscalls-report')