/* * Copyright (c) 2016 HiSilicon Technologies Co., Ltd. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see . */ #ifndef __DTS_HI3516CV300_CLOCK_H #define __DTS_HI3516CV300_CLOCK_H /* hi3516CV300 core CRG */ #define HI3516CV300_APB_CLK 0 #define HI3516CV300_UART0_CLK 1 #define HI3516CV300_UART1_CLK 2 #define HI3516CV300_UART2_CLK 3 #define HI3516CV300_SPI0_CLK 4 #define HI3516CV300_SPI1_CLK 5 #define HI3516CV300_FMC_CLK 6 #define HI3516CV300_MMC0_CLK 7 #define HI3516CV300_MMC1_CLK 8 #define HI3516CV300_MMC2_CLK 9 #define HI3516CV300_MMC3_CLK 10 #define HI3516CV300_ETH_CLK 11 #define HI3516CV300_ETH_MACIF_CLK 12 #define HI3516CV300_DMAC_CLK 13 #define HI3516CV300_PWM_CLK 14 #define HI3516CV300_USB2_BUS_CLK 15 #define HI3516CV300_USB2_OHCI48M_CLK 16 #define HI3516CV300_USB2_OHCI12M_CLK 17 #define HI3516CV300_USB2_OTG_UTMI_CLK 18 #define HI3516CV300_USB2_HST_PHY_CLK 19 #define HI3516CV300_USB2_UTMI0_CLK 20 #define HI3516CV300_USB2_PHY_CLK 21 /* hi3516CV300 sysctrl CRG */ #define HI3516CV300_WDT_CLK 1 #endif /* __DTS_HI3516CV300_CLOCK_H */ /refs/?h=nds-private-remove&id=cdca06e4e85974d8a3503ab15709dbbaf90d3dd1'>refslogtreecommitdiff
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authorAlexander Stein <alexander.stein@systec-electronic.com>2017-01-30 12:35:28 +0100
committerLinus Walleij <linus.walleij@linaro.org>2017-01-30 15:53:57 +0100
commitcdca06e4e85974d8a3503ab15709dbbaf90d3dd1 (patch)
tree268b0c01070a957006db97c88dccb5fb061440ff /net/mpls/internal.h
parent1b89970d81bbd52720fc64a3fe9572ee33588363 (diff)
pinctrl: baytrail: Add missing spinlock usage in byt_gpio_irq_handler
According to VLI64 Intel Atom E3800 Specification Update (#329901) concurrent read accesses may result in returning 0xffffffff and write accesses may be dropped silently. To workaround all accesses must be protected by locks. Cc: stable@vger.kernel.org Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'net/mpls/internal.h')