/* * This header provides clock numbers for the ingenic,jz4740-cgu DT binding. * * They are roughly ordered as: * - external clocks * - PLLs * - muxes/dividers in the order they appear in the jz4740 programmers manual * - gates in order of their bit in the CLKGR* registers */ #ifndef __DT_BINDINGS_CLOCK_JZ4740_CGU_H__ #define __DT_BINDINGS_CLOCK_JZ4740_CGU_H__ #define JZ4740_CLK_EXT 0 #define JZ4740_CLK_RTC 1 #define JZ4740_CLK_PLL 2 #define JZ4740_CLK_PLL_HALF 3 #define JZ4740_CLK_CCLK 4 #define JZ4740_CLK_HCLK 5 #define JZ4740_CLK_PCLK 6 #define JZ4740_CLK_MCLK 7 #define JZ4740_CLK_LCD 8 #define JZ4740_CLK_LCD_PCLK 9 #define JZ4740_CLK_I2S 10 #define JZ4740_CLK_SPI 11 #define JZ4740_CLK_MMC 12 #define JZ4740_CLK_UHC 13 #define JZ4740_CLK_UDC 14 #define JZ4740_CLK_UART0 15 #define JZ4740_CLK_UART1 16 #define JZ4740_CLK_DMA 17 #define JZ4740_CLK_IPU 18 #define JZ4740_CLK_ADC 19 #define JZ4740_CLK_I2C 20 #define JZ4740_CLK_AIC 21 #endif /* __DT_BINDINGS_CLOCK_JZ4740_CGU_H__ */ te-cleanup'>emaclite-cleanup net-next plumbingsTobias Klauser
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authorJohan Hovold <johan@kernel.org>2017-01-30 11:26:38 +0100
committerJiri Kosina <jkosina@suse.cz>2017-01-31 12:59:32 +0100
commit7a7b5df84b6b4e5d599c7289526eed96541a0654 (patch)
treecf7514c7ddf4410fe37ca9099a2785e1cf08fa7d /include/net/phonet
parent877a021e08ccb6434718c0cc781fdf943c884cc0 (diff)
HID: cp2112: fix sleep-while-atomic
A recent commit fixing DMA-buffers on stack added a shared transfer buffer protected by a spinlock. This is broken as the USB HID request callbacks can sleep. Fix this up by replacing the spinlock with a mutex. Fixes: 1ffb3c40ffb5 ("HID: cp2112: make transfer buffers DMA capable") Cc: stable <stable@vger.kernel.org> # 4.9 Signed-off-by: Johan Hovold <johan@kernel.org> Reviewed-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'include/net/phonet')