/* * This header provides clock numbers for the ingenic,jz4780-cgu DT binding. * * They are roughly ordered as: * - external clocks * - PLLs * - muxes/dividers in the order they appear in the jz4780 programmers manual * - gates in order of their bit in the CLKGR* registers */ #ifndef __DT_BINDINGS_CLOCK_JZ4780_CGU_H__ #define __DT_BINDINGS_CLOCK_JZ4780_CGU_H__ #define JZ4780_CLK_EXCLK 0 #define JZ4780_CLK_RTCLK 1 #define JZ4780_CLK_APLL 2 #define JZ4780_CLK_MPLL 3 #define JZ4780_CLK_EPLL 4 #define JZ4780_CLK_VPLL 5 #define JZ4780_CLK_OTGPHY 6 #define JZ4780_CLK_SCLKA 7 #define JZ4780_CLK_CPUMUX 8 #define JZ4780_CLK_CPU 9 #define JZ4780_CLK_L2CACHE 10 #define JZ4780_CLK_AHB0 11 #define JZ4780_CLK_AHB2PMUX 12 #define JZ4780_CLK_AHB2 13 #define JZ4780_CLK_PCLK 14 #define JZ4780_CLK_DDR 15 #define JZ4780_CLK_VPU 16 #define JZ4780_CLK_I2SPLL 17 #define JZ4780_CLK_I2S 18 #define JZ4780_CLK_LCD0PIXCLK 19 #define JZ4780_CLK_LCD1PIXCLK 20 #define JZ4780_CLK_MSCMUX 21 #define JZ4780_CLK_MSC0 22 #define JZ4780_CLK_MSC1 23 #define JZ4780_CLK_MSC2 24 #define JZ4780_CLK_UHC 25 #define JZ4780_CLK_SSIPLL 26 #define JZ4780_CLK_SSI 27 #define JZ4780_CLK_CIMMCLK 28 #define JZ4780_CLK_PCMPLL 29 #define JZ4780_CLK_PCM 30 #define JZ4780_CLK_GPU 31 #define JZ4780_CLK_HDMI 32 #define JZ4780_CLK_BCH 33 #define JZ4780_CLK_NEMC 34 #define JZ4780_CLK_OTG0 35 #define JZ4780_CLK_SSI0 36 #define JZ4780_CLK_SMB0 37 #define JZ4780_CLK_SMB1 38 #define JZ4780_CLK_SCC 39 #define JZ4780_CLK_AIC 40 #define JZ4780_CLK_TSSI0 41 #define JZ4780_CLK_OWI 42 #define JZ4780_CLK_KBC 43 #define JZ4780_CLK_SADC 44 #define JZ4780_CLK_UART0 45 #define JZ4780_CLK_UART1 46 #define JZ4780_CLK_UART2 47 #define JZ4780_CLK_UART3 48 #define JZ4780_CLK_SSI1 49 #define JZ4780_CLK_SSI2 50 #define JZ4780_CLK_PDMA 51 #define JZ4780_CLK_GPS 52 #define JZ4780_CLK_MAC 53 #define JZ4780_CLK_SMB2 54 #define JZ4780_CLK_CIM 55 #define JZ4780_CLK_LCD 56 #define JZ4780_CLK_TVE 57 #define JZ4780_CLK_IPU 58 #define JZ4780_CLK_DDR0 59 #define JZ4780_CLK_DDR1 60 #define JZ4780_CLK_SMB3 61 #define JZ4780_CLK_TSSI1 62 #define JZ4780_CLK_COMPRESS 63 #define JZ4780_CLK_AIC1 64 #define JZ4780_CLK_GPVLC 65 #define JZ4780_CLK_OTG1 66 #define JZ4780_CLK_UART4 67 #define JZ4780_CLK_AHBMON 68 #define JZ4780_CLK_SMB4 69 #define JZ4780_CLK_DES 70 #define JZ4780_CLK_X2D 71 #define JZ4780_CLK_CORE1 72 #endif /* __DT_BINDINGS_CLOCK_JZ4780_CGU_H__ */ ption value='grep'>log msg
path: root/include/dt-bindings/mfd/dbx500-prcmu.h
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authorMaarten Lankhorst <maarten.lankhorst@linux.intel.com>2017-01-31 10:25:25 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2017-01-31 13:41:46 +0100
commit92c715fca907686f5298220ece53423e38ba3aed (patch)
tree286158fdad04c9b54955350abb95d4f1c0dc860a /include/dt-bindings/mfd/dbx500-prcmu.h
parente6e7b48b295afa5a5ab440de0a94d9ad8b3ce2d0 (diff)
drm/atomic: Fix double free in drm_atomic_state_default_clear
drm_atomic_helper_page_flip and drm_atomic_ioctl set their own events in crtc_state->event. But when it's set the event is freed in 2 places. Solve this by only freeing the event in the atomic ioctl when it allocated its own event. This has been broken twice. The first time when the code was introduced, but only in the corner case when an event is allocated, but more crtc's were included by atomic check and then failing. This can mostly happen when you do an atomic modeset in i915 and the display clock is changed, which forces all crtc's to be included to the state. This has been broken worse by adding in-fences support, which caused the double free to be done unconditionally. [IGT] kms_rotation_crc: starting subtest primary-rotation-180 ============================================================================= BUG kmalloc-128 (Tainted: G U ): Object already free ----------------------------------------------------------------------------- Disabling lock debugging due to kernel taint INFO: Allocated in drm_atomic_helper_setup_commit+0x285/0x2f0 [drm_kms_helper] age=0 cpu=3 pid=1529 ___slab_alloc+0x308/0x3b0 __slab_alloc+0xd/0x20 kmem_cache_alloc_trace+0x92/0x1c0 drm_atomic_helper_setup_commit+0x285/0x2f0 [drm_kms_helper] intel_atomic_commit+0x35/0x4f0 [i915] drm_atomic_commit+0x46/0x50 [drm] drm_mode_atomic_ioctl+0x7d4/0xab0 [drm] drm_ioctl+0x2b3/0x490 [drm] do_vfs_ioctl+0x69c/0x700 SyS_ioctl+0x4e/0x80 entry_SYSCALL_64_fastpath+0x13/0x94 INFO: Freed in drm_event_cancel_free+0xa3/0xb0 [drm] age=0 cpu=3 pid=1529 __slab_free+0x48/0x2e0 kfree+0x159/0x1a0 drm_event_cancel_free+0xa3/0xb0 [drm] drm_mode_atomic_ioctl+0x86d/0xab0 [drm] drm_ioctl+0x2b3/0x490 [drm] do_vfs_ioctl+0x69c/0x700 SyS_ioctl+0x4e/0x80 entry_SYSCALL_64_fastpath+0x13/0x94 INFO: Slab 0xffffde1f0997b080 objects=17 used=2 fp=0xffff92fb65ec2578 flags=0x200000000008101 INFO: Object 0xffff92fb65ec2578 @offset=1400 fp=0xffff92fb65ec2ae8 Redzone ffff92fb65ec2570: bb bb bb bb bb bb bb bb ........ Object ffff92fb65ec2578: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec2588: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec2598: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec25a8: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec25b8: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec25c8: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec25d8: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk Object ffff92fb65ec25e8: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b a5 kkkkkkkkkkkkkkk. Redzone ffff92fb65ec25f8: bb bb bb bb bb bb bb bb ........ Padding ffff92fb65ec2738: 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZ CPU: 3 PID: 180 Comm: kworker/3:2 Tainted: G BU 4.10.0-rc6-patser+ #5039 Hardware name: /NUC5PPYB, BIOS PYBSWCEL.86A.0031.2015.0601.1712 06/01/2015 Workqueue: events intel_atomic_helper_free_state [i915] Call Trace: dump_stack+0x4d/0x6d print_trailer+0x20c/0x220 free_debug_processing+0x1c6/0x330 ? drm_atomic_state_default_clear+0xf7/0x1c0 [drm] __slab_free+0x48/0x2e0 ? drm_atomic_state_default_clear+0xf7/0x1c0 [drm] kfree+0x159/0x1a0 drm_atomic_state_default_clear+0xf7/0x1c0 [drm] ? drm_atomic_state_clear+0x30/0x30 [drm] intel_atomic_state_clear+0xd/0x20 [i915] drm_atomic_state_clear+0x1a/0x30 [drm] __drm_atomic_state_free+0x13/0x60 [drm] intel_atomic_helper_free_state+0x5d/0x70 [i915] process_one_work+0x260/0x4a0 worker_thread+0x2d1/0x4f0 kthread+0x127/0x130 ? process_one_work+0x4a0/0x4a0 ? kthread_stop+0x120/0x120 ret_from_fork+0x29/0x40 FIX kmalloc-128: Object at 0xffff92fb65ec2578 not freed Fixes: 3b24f7d67581 ("drm/atomic: Add struct drm_crtc_commit to track async updates") Fixes: 9626014258a5 ("drm/fence: add in-fences support") Cc: <stable@vger.kernel.org> # v4.8+ Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1485854725-27640-1-git-send-email-maarten.lankhorst@linux.intel.com
Diffstat (limited to 'include/dt-bindings/mfd/dbx500-prcmu.h')