/* * Copyright (c) 2015 Vladimir Zapolskiy * * This code is released using a dual license strategy: BSD/GPL * You can choose the licence that better fits your requirements. * * Released under the terms of 3-clause BSD License * Released under the terms of GNU General Public License Version 2.0 * */ #ifndef __DT_BINDINGS_LPC32XX_CLOCK_H #define __DT_BINDINGS_LPC32XX_CLOCK_H /* LPC32XX System Control Block clocks */ #define LPC32XX_CLK_RTC 1 #define LPC32XX_CLK_DMA 2 #define LPC32XX_CLK_MLC 3 #define LPC32XX_CLK_SLC 4 #define LPC32XX_CLK_LCD 5 #define LPC32XX_CLK_MAC 6 #define LPC32XX_CLK_SD 7 #define LPC32XX_CLK_DDRAM 8 #define LPC32XX_CLK_SSP0 9 #define LPC32XX_CLK_SSP1 10 #define LPC32XX_CLK_UART3 11 #define LPC32XX_CLK_UART4 12 #define LPC32XX_CLK_UART5 13 #define LPC32XX_CLK_UART6 14 #define LPC32XX_CLK_IRDA 15 #define LPC32XX_CLK_I2C1 16 #define LPC32XX_CLK_I2C2 17 #define LPC32XX_CLK_TIMER0 18 #define LPC32XX_CLK_TIMER1 19 #define LPC32XX_CLK_TIMER2 20 #define LPC32XX_CLK_TIMER3 21 #define LPC32XX_CLK_TIMER4 22 #define LPC32XX_CLK_TIMER5 23 #define LPC32XX_CLK_WDOG 24 #define LPC32XX_CLK_I2S0 25 #define LPC32XX_CLK_I2S1 26 #define LPC32XX_CLK_SPI1 27 #define LPC32XX_CLK_SPI2 28 #define LPC32XX_CLK_MCPWM 29 #define LPC32XX_CLK_HSTIMER 30 #define LPC32XX_CLK_KEY 31 #define LPC32XX_CLK_PWM1 32 #define LPC32XX_CLK_PWM2 33 #define LPC32XX_CLK_ADC 34 #define LPC32XX_CLK_HCLK_PLL 35 #define LPC32XX_CLK_PERIPH 36 /* LPC32XX USB clocks */ #define LPC32XX_USB_CLK_I2C 1 #define LPC32XX_USB_CLK_DEVICE 2 #define LPC32XX_USB_CLK_HOST 3 #endif /* __DT_BINDINGS_LPC32XX_CLOCK_H */ ='active' href='/cgit.cgi/linux/net-next.git/log/Documentation/sound/hd-audio'>logtreecommitdiff
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authorIago Abal <mail@iagoabal.eu>2017-01-11 14:00:21 +0100
committerVinod Koul <vinod.koul@intel.com>2017-01-25 15:35:11 +0530
commit91539eb1fda2d530d3b268eef542c5414e54bf1a (patch)
tree960f5ca6342ad20837aff18aad6e8ecd7da32fd6 /include/uapi/scsi
parent6610d0edf6dc7ee97e46ab3a538a565c79d26199 (diff)
dmaengine: pl330: fix double lock
The static bug finder EBA (http://www.iagoabal.eu/eba/) reported the following double-lock bug: Double lock: 1. spin_lock_irqsave(pch->lock, flags) at pl330_free_chan_resources:2236; 2. call to function `pl330_release_channel' immediately after; 3. call to function `dma_pl330_rqcb' in line 1753; 4. spin_lock_irqsave(pch->lock, flags) at dma_pl330_rqcb:1505. I have fixed it as suggested by Marek Szyprowski. First, I have replaced `pch->lock' with `pl330->lock' in functions `pl330_alloc_chan_resources' and `pl330_free_chan_resources'. This avoids the double-lock by acquiring a different lock than `dma_pl330_rqcb'. NOTE that, as a result, `pl330_free_chan_resources' executes `list_splice_tail_init' on `pch->work_list' under lock `pl330->lock', whereas in the rest of the code `pch->work_list' is protected by `pch->lock'. I don't know if this may cause race conditions. Similarly `pch->cyclic' is written by `pl330_alloc_chan_resources' under `pl330->lock' but read by `pl330_tx_submit' under `pch->lock'. Second, I have removed locking from `pl330_request_channel' and `pl330_release_channel' functions. Function `pl330_request_channel' is only called from `pl330_alloc_chan_resources', so the lock is already held. Function `pl330_release_channel' is called from `pl330_free_chan_resources', which already holds the lock, and from `pl330_del'. Function `pl330_del' is called in an error path of `pl330_probe' and at the end of `pl330_remove', but I assume that there cannot be concurrent accesses to the protected data at those points. Signed-off-by: Iago Abal <mail@iagoabal.eu> Reviewed-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'include/uapi/scsi')