#ifndef __DTS_MARVELL_PXA168_CLOCK_H #define __DTS_MARVELL_PXA168_CLOCK_H /* fixed clocks and plls */ #define PXA168_CLK_CLK32 1 #define PXA168_CLK_VCTCXO 2 #define PXA168_CLK_PLL1 3 #define PXA168_CLK_PLL1_2 8 #define PXA168_CLK_PLL1_4 9 #define PXA168_CLK_PLL1_8 10 #define PXA168_CLK_PLL1_16 11 #define PXA168_CLK_PLL1_6 12 #define PXA168_CLK_PLL1_12 13 #define PXA168_CLK_PLL1_24 14 #define PXA168_CLK_PLL1_48 15 #define PXA168_CLK_PLL1_96 16 #define PXA168_CLK_PLL1_13 17 #define PXA168_CLK_PLL1_13_1_5 18 #define PXA168_CLK_PLL1_2_1_5 19 #define PXA168_CLK_PLL1_3_16 20 #define PXA168_CLK_PLL1_192 21 #define PXA168_CLK_UART_PLL 27 #define PXA168_CLK_USB_PLL 28 /* apb periphrals */ #define PXA168_CLK_TWSI0 60 #define PXA168_CLK_TWSI1 61 #define PXA168_CLK_TWSI2 62 #define PXA168_CLK_TWSI3 63 #define PXA168_CLK_GPIO 64 #define PXA168_CLK_KPC 65 #define PXA168_CLK_RTC 66 #define PXA168_CLK_PWM0 67 #define PXA168_CLK_PWM1 68 #define PXA168_CLK_PWM2 69 #define PXA168_CLK_PWM3 70 #define PXA168_CLK_UART0 71 #define PXA168_CLK_UART1 72 #define PXA168_CLK_UART2 73 #define PXA168_CLK_SSP0 74 #define PXA168_CLK_SSP1 75 #define PXA168_CLK_SSP2 76 #define PXA168_CLK_SSP3 77 #define PXA168_CLK_SSP4 78 #define PXA168_CLK_TIMER 79 /* axi periphrals */ #define PXA168_CLK_DFC 100 #define PXA168_CLK_SDH0 101 #define PXA168_CLK_SDH1 102 #define PXA168_CLK_SDH2 103 #define PXA168_CLK_USB 104 #define PXA168_CLK_SPH 105 #define PXA168_CLK_DISP0 106 #define PXA168_CLK_CCIC0 107 #define PXA168_CLK_CCIC0_PHY 108 #define PXA168_CLK_CCIC0_SPHY 109 #define PXA168_NR_CLKS 200 #endif nux/net-next.git/log/include/uapi/rdma'>logtreecommitdiff
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authorJiri Slaby <jslaby@suse.cz>2017-01-18 14:29:21 +0100
committerIngo Molnar <mingo@kernel.org>2017-01-19 08:39:44 +0100
commitb5b46c4740aed1538544f0fa849c5b76c7823469 (patch)
tree125e7aced4835bad6f6a0c0d02d012f333caf922 /include/uapi/rdma
parentfa19a769f82fb9a5ca000b83cacd13fcaeda51ac (diff)
objtool: Fix IRET's opcode
The IRET opcode is 0xcf according to the Intel manual and also to objdump of my vmlinux: 1ea8: 48 cf iretq Fix the opcode in arch_decode_instruction(). The previous value (0xc5) seems to correspond to LDS. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Acked-by: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/20170118132921.19319-1-jslaby@suse.cz Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'include/uapi/rdma')