/* * This header provides constants for MPC512x clock specs in DT bindings. */ #ifndef _DT_BINDINGS_CLOCK_MPC512x_CLOCK_H #define _DT_BINDINGS_CLOCK_MPC512x_CLOCK_H #define MPC512x_CLK_DUMMY 0 #define MPC512x_CLK_REF 1 #define MPC512x_CLK_SYS 2 #define MPC512x_CLK_DIU 3 #define MPC512x_CLK_VIU 4 #define MPC512x_CLK_CSB 5 #define MPC512x_CLK_E300 6 #define MPC512x_CLK_IPS 7 #define MPC512x_CLK_FEC 8 #define MPC512x_CLK_SATA 9 #define MPC512x_CLK_PATA 10 #define MPC512x_CLK_NFC 11 #define MPC512x_CLK_LPC 12 #define MPC512x_CLK_MBX_BUS 13 #define MPC512x_CLK_MBX 14 #define MPC512x_CLK_MBX_3D 15 #define MPC512x_CLK_AXE 16 #define MPC512x_CLK_USB1 17 #define MPC512x_CLK_USB2 18 #define MPC512x_CLK_I2C 19 #define MPC512x_CLK_MSCAN0_MCLK 20 #define MPC512x_CLK_MSCAN1_MCLK 21 #define MPC512x_CLK_MSCAN2_MCLK 22 #define MPC512x_CLK_MSCAN3_MCLK 23 #define MPC512x_CLK_BDLC 24 #define MPC512x_CLK_SDHC 25 #define MPC512x_CLK_PCI 26 #define MPC512x_CLK_PSC_MCLK_IN 27 #define MPC512x_CLK_SPDIF_TX 28 #define MPC512x_CLK_SPDIF_RX 29 #define MPC512x_CLK_SPDIF_MCLK 30 #define MPC512x_CLK_SPDIF 31 #define MPC512x_CLK_AC97 32 #define MPC512x_CLK_PSC0_MCLK 33 #define MPC512x_CLK_PSC1_MCLK 34 #define MPC512x_CLK_PSC2_MCLK 35 #define MPC512x_CLK_PSC3_MCLK 36 #define MPC512x_CLK_PSC4_MCLK 37 #define MPC512x_CLK_PSC5_MCLK 38 #define MPC512x_CLK_PSC6_MCLK 39 #define MPC512x_CLK_PSC7_MCLK 40 #define MPC512x_CLK_PSC8_MCLK 41 #define MPC512x_CLK_PSC9_MCLK 42 #define MPC512x_CLK_PSC10_MCLK 43 #define MPC512x_CLK_PSC11_MCLK 44 #define MPC512x_CLK_PSC_FIFO 45 #define MPC512x_CLK_PSC0 46 #define MPC512x_CLK_PSC1 47 #define MPC512x_CLK_PSC2 48 #define MPC512x_CLK_PSC3 49 #define MPC512x_CLK_PSC4 50 #define MPC512x_CLK_PSC5 51 #define MPC512x_CLK_PSC6 52 #define MPC512x_CLK_PSC7 53 #define MPC512x_CLK_PSC8 54 #define MPC512x_CLK_PSC9 55 #define MPC512x_CLK_PSC10 56 #define MPC512x_CLK_PSC11 57 #define MPC512x_CLK_SDHC2 58 #define MPC512x_CLK_FEC2 59 #define MPC512x_CLK_OUT0_CLK 60 #define MPC512x_CLK_OUT1_CLK 61 #define MPC512x_CLK_OUT2_CLK 62 #define MPC512x_CLK_OUT3_CLK 63 #define MPC512x_CLK_CAN_CLK_IN 64 #define MPC512x_CLK_LAST_PUBLIC 64 #endif bc3b9b25'/>
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authorThomas Gleixner <tglx@linutronix.de>2017-01-31 09:37:34 +0100
committerThomas Gleixner <tglx@linutronix.de>2017-01-31 21:47:58 +0100
commit0becc0ae5b42828785b589f686725ff5bc3b9b25 (patch)
treebe6d0e1f37c38ed0a7dd5da2d4b1e93f0fb43101 /net/vmw_vsock
parent24c2503255d35c269b67162c397a1a1c1e02f6ce (diff)
x86/mce: Make timer handling more robust
Erik reported that on a preproduction hardware a CMCI storm triggers the BUG_ON in add_timer_on(). The reason is that the per CPU MCE timer is started by the CMCI logic before the MCE CPU hotplug callback starts the timer with add_timer_on(). So the timer is already queued which triggers the BUG. Using add_timer_on() is pretty pointless in this code because the timer is strictlty per CPU, initialized as pinned and all operations which arm the timer happen on the CPU to which the timer belongs. Simplify the whole machinery by using mod_timer() instead of add_timer_on() which avoids the problem because mod_timer() can handle already queued timers. Use __start_timer() everywhere so the earliest armed expiry time is preserved. Reported-by: Erik Veijola <erik.veijola@intel.com> Tested-by: Borislav Petkov <bp@alien8.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Borislav Petkov <bp@alien8.de> Cc: Tony Luck <tony.luck@intel.com> Link: http://lkml.kernel.org/r/alpine.DEB.2.20.1701310936080.3457@nanos Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'net/vmw_vsock')