/* * Copyright (c) 2014, The Linux Foundation. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and * may be copied, distributed, and modified under those terms. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef _DT_BINDINGS_CLK_LCC_MSM8960_H #define _DT_BINDINGS_CLK_LCC_MSM8960_H #define PLL4 0 #define MI2S_OSR_SRC 1 #define MI2S_OSR_CLK 2 #define MI2S_DIV_CLK 3 #define MI2S_BIT_DIV_CLK 4 #define MI2S_BIT_CLK 5 #define PCM_SRC 6 #define PCM_CLK_OUT 7 #define PCM_CLK 8 #define SLIMBUS_SRC 9 #define AUDIO_SLIMBUS_CLK 10 #define SPS_SLIMBUS_CLK 11 #define CODEC_I2S_MIC_OSR_SRC 12 #define CODEC_I2S_MIC_OSR_CLK 13 #define CODEC_I2S_MIC_DIV_CLK 14 #define CODEC_I2S_MIC_BIT_DIV_CLK 15 #define CODEC_I2S_MIC_BIT_CLK 16 #define SPARE_I2S_MIC_OSR_SRC 17 #define SPARE_I2S_MIC_OSR_CLK 18 #define SPARE_I2S_MIC_DIV_CLK 19 #define SPARE_I2S_MIC_BIT_DIV_CLK 20 #define SPARE_I2S_MIC_BIT_CLK 21 #define CODEC_I2S_SPKR_OSR_SRC 22 #define CODEC_I2S_SPKR_OSR_CLK 23 #define CODEC_I2S_SPKR_DIV_CLK 24 #define CODEC_I2S_SPKR_BIT_DIV_CLK 25 #define CODEC_I2S_SPKR_BIT_CLK 26 #define SPARE_I2S_SPKR_OSR_SRC 27 #define SPARE_I2S_SPKR_OSR_CLK 28 #define SPARE_I2S_SPKR_DIV_CLK 29 #define SPARE_I2S_SPKR_BIT_DIV_CLK 30 #define SPARE_I2S_SPKR_BIT_CLK 31 #endif ext.git/refs/?id=3484ecbe0e9deb94afb0b9b6172d77e98eb72b94'>refslogtreecommitdiff
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authorGiovanni Cabiddu <giovanni.cabiddu@intel.com>2016-12-22 15:00:12 +0000
committerHerbert Xu <herbert@gondor.apana.org.au>2017-02-02 21:54:52 +0800
commit3484ecbe0e9deb94afb0b9b6172d77e98eb72b94 (patch)
tree4d4be0d20d4946c51ef47a882d78c9934a219c0e /include/dt-bindings/pinctrl/samsung.h
parent11e3b725cfc282efe9d4a354153e99d86a16af08 (diff)
crypto: qat - fix bar discovery for c62x
Some accelerators of the c62x series have only two bars. This patch skips BAR0 if the accelerator does not have it. Cc: <stable@vger.kernel.org> Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'include/dt-bindings/pinctrl/samsung.h')