/* * Copyright (c) 2014, The Linux Foundation. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and * may be copied, distributed, and modified under those terms. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef _DT_BINDINGS_CLK_LCC_MSM8960_H #define _DT_BINDINGS_CLK_LCC_MSM8960_H #define PLL4 0 #define MI2S_OSR_SRC 1 #define MI2S_OSR_CLK 2 #define MI2S_DIV_CLK 3 #define MI2S_BIT_DIV_CLK 4 #define MI2S_BIT_CLK 5 #define PCM_SRC 6 #define PCM_CLK_OUT 7 #define PCM_CLK 8 #define SLIMBUS_SRC 9 #define AUDIO_SLIMBUS_CLK 10 #define SPS_SLIMBUS_CLK 11 #define CODEC_I2S_MIC_OSR_SRC 12 #define CODEC_I2S_MIC_OSR_CLK 13 #define CODEC_I2S_MIC_DIV_CLK 14 #define CODEC_I2S_MIC_BIT_DIV_CLK 15 #define CODEC_I2S_MIC_BIT_CLK 16 #define SPARE_I2S_MIC_OSR_SRC 17 #define SPARE_I2S_MIC_OSR_CLK 18 #define SPARE_I2S_MIC_DIV_CLK 19 #define SPARE_I2S_MIC_BIT_DIV_CLK 20 #define SPARE_I2S_MIC_BIT_CLK 21 #define CODEC_I2S_SPKR_OSR_SRC 22 #define CODEC_I2S_SPKR_OSR_CLK 23 #define CODEC_I2S_SPKR_DIV_CLK 24 #define CODEC_I2S_SPKR_BIT_DIV_CLK 25 #define CODEC_I2S_SPKR_BIT_CLK 26 #define SPARE_I2S_SPKR_OSR_SRC 27 #define SPARE_I2S_SPKR_OSR_CLK 28 #define SPARE_I2S_SPKR_DIV_CLK 29 #define SPARE_I2S_SPKR_BIT_DIV_CLK 30 #define SPARE_I2S_SPKR_BIT_CLK 31 #endif ef='/cgit.cgi/linux/net-next.git/refs/?id=08d85f3ea99f1eeafc4e8507936190e86a16ee8c'>refslogtreecommitdiff
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authorMarc Zyngier <marc.zyngier@arm.com>2017-01-17 16:00:48 +0000
committerThomas Gleixner <tglx@linutronix.de>2017-01-30 15:18:56 +0100
commit08d85f3ea99f1eeafc4e8507936190e86a16ee8c (patch)
tree410bb1acd0cd7dcfaad37ae7b63ff243b7fa4bee /include/dt-bindings/iio/adc/fsl-imx25-gcq.h
parent566cf877a1fcb6d6dc0126b076aad062054c2637 (diff)
irqdomain: Avoid activating interrupts more than once
Since commit f3b0946d629c ("genirq/msi: Make sure PCI MSIs are activated early"), we can end-up activating a PCI/MSI twice (once at allocation time, and once at startup time). This is normally of no consequences, except that there is some HW out there that may misbehave if activate is used more than once (the GICv3 ITS, for example, uses the activate callback to issue the MAPVI command, and the architecture spec says that "If there is an existing mapping for the EventID-DeviceID combination, behavior is UNPREDICTABLE"). While this could be worked around in each individual driver, it may make more sense to tackle the issue at the core level. In order to avoid getting in that situation, let's have a per-interrupt flag to remember if we have already activated that interrupt or not. Fixes: f3b0946d629c ("genirq/msi: Make sure PCI MSIs are activated early") Reported-and-tested-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/1484668848-24361-1-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/dt-bindings/iio/adc/fsl-imx25-gcq.h')