/* * Copyright (C) 2016 Cogent Embedded, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. */ #ifndef __DT_BINDINGS_CLOCK_R8A7792_H__ #define __DT_BINDINGS_CLOCK_R8A7792_H__ /* CPG */ #define R8A7792_CLK_MAIN 0 #define R8A7792_CLK_PLL0 1 #define R8A7792_CLK_PLL1 2 #define R8A7792_CLK_PLL3 3 #define R8A7792_CLK_LB 4 #define R8A7792_CLK_QSPI 5 #define R8A7792_CLK_Z 6 /* MSTP0 */ #define R8A7792_CLK_MSIOF0 0 /* MSTP1 */ #define R8A7792_CLK_JPU 6 #define R8A7792_CLK_TMU1 11 #define R8A7792_CLK_TMU3 21 #define R8A7792_CLK_TMU2 22 #define R8A7792_CLK_CMT0 24 #define R8A7792_CLK_TMU0 25 #define R8A7792_CLK_VSP1DU1 27 #define R8A7792_CLK_VSP1DU0 28 #define R8A7792_CLK_VSP1_SY 31 /* MSTP2 */ #define R8A7792_CLK_MSIOF1 8 #define R8A7792_CLK_SYS_DMAC1 18 #define R8A7792_CLK_SYS_DMAC0 19 /* MSTP3 */ #define R8A7792_CLK_TPU0 4 #define R8A7792_CLK_SDHI0 14 #define R8A7792_CLK_CMT1 29 /* MSTP4 */ #define R8A7792_CLK_IRQC 7 /* MSTP5 */ #define R8A7792_CLK_AUDIO_DMAC0 2 #define R8A7792_CLK_THERMAL 22 #define R8A7792_CLK_PWM 23 /* MSTP7 */ #define R8A7792_CLK_HSCIF1 16 #define R8A7792_CLK_HSCIF0 17 #define R8A7792_CLK_SCIF3 18 #define R8A7792_CLK_SCIF2 19 #define R8A7792_CLK_SCIF1 20 #define R8A7792_CLK_SCIF0 21 #define R8A7792_CLK_DU1 23 #define R8A7792_CLK_DU0 24 /* MSTP8 */ #define R8A7792_CLK_VIN5 4 #define R8A7792_CLK_VIN4 5 #define R8A7792_CLK_VIN3 8 #define R8A7792_CLK_VIN2 9 #define R8A7792_CLK_VIN1 10 #define R8A7792_CLK_VIN0 11 #define R8A7792_CLK_ETHERAVB 12 /* MSTP9 */ #define R8A7792_CLK_GPIO7 4 #define R8A7792_CLK_GPIO6 5 #define R8A7792_CLK_GPIO5 7 #define R8A7792_CLK_GPIO4 8 #define R8A7792_CLK_GPIO3 9 #define R8A7792_CLK_GPIO2 10 #define R8A7792_CLK_GPIO1 11 #define R8A7792_CLK_GPIO0 12 #define R8A7792_CLK_GPIO11 13 #define R8A7792_CLK_GPIO10 14 #define R8A7792_CLK_CAN1 15 #define R8A7792_CLK_CAN0 16 #define R8A7792_CLK_QSPI_MOD 17 #define R8A7792_CLK_GPIO9 19 #define R8A7792_CLK_GPIO8 21 #define R8A7792_CLK_I2C5 25 #define R8A7792_CLK_IICDVFS 26 #define R8A7792_CLK_I2C4 27 #define R8A7792_CLK_I2C3 28 #define R8A7792_CLK_I2C2 29 #define R8A7792_CLK_I2C1 30 #define R8A7792_CLK_I2C0 31 /* MSTP10 */ #define R8A7792_CLK_SSI_ALL 5 #define R8A7792_CLK_SSI4 11 #define R8A7792_CLK_SSI3 12 #endif /* __DT_BINDINGS_CLOCK_R8A7792_H__ */
path: root/include/trace/events
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authorRuslan Ruslichenko <rruslich@cisco.com>2017-01-17 16:13:52 +0200
committerThomas Gleixner <tglx@linutronix.de>2017-01-18 15:37:28 +0100
commit020eb3daaba2857b32c4cf4c82f503d6a00a67de (patch)
tree329a05b424d783db675a4c711bd7633575e8181b /include/trace/events
parent49def1853334396f948dcb4cedb9347abb318df5 (diff)
x86/ioapic: Restore IO-APIC irq_chip retrigger callback
commit d32932d02e18 removed the irq_retrigger callback from the IO-APIC chip and did not add it to the new IO-APIC-IR irq chip. Unfortunately the software resend fallback is not enabled on X86, so edge interrupts which are received during the lazy disabled state of the interrupt line are not retriggered and therefor lost. Restore the callbacks. [ tglx: Massaged changelog ] Fixes: d32932d02e18 ("x86/irq: Convert IOAPIC to use hierarchical irqdomain interfaces") Signed-off-by: Ruslan Ruslichenko <rruslich@cisco.com> Cc: xe-linux-external@cisco.com Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/1484662432-13580-1-git-send-email-rruslich@cisco.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/trace/events')
s protection and flags bits through mmap2 interface") Link: http://lkml.kernel.org/r/20170126221508.GF6536@twins.programming.kicks-ass.net Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'tools')