/* * r8a7793 clock definition * * Copyright (C) 2014 Renesas Electronics Corporation * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #ifndef __DT_BINDINGS_CLOCK_R8A7793_H__ #define __DT_BINDINGS_CLOCK_R8A7793_H__ /* CPG */ #define R8A7793_CLK_MAIN 0 #define R8A7793_CLK_PLL0 1 #define R8A7793_CLK_PLL1 2 #define R8A7793_CLK_PLL3 3 #define R8A7793_CLK_LB 4 #define R8A7793_CLK_QSPI 5 #define R8A7793_CLK_SDH 6 #define R8A7793_CLK_SD0 7 #define R8A7793_CLK_Z 8 #define R8A7793_CLK_RCAN 9 #define R8A7793_CLK_ADSP 10 /* MSTP0 */ #define R8A7793_CLK_MSIOF0 0 /* MSTP1 */ #define R8A7793_CLK_VCP0 1 #define R8A7793_CLK_VPC0 3 #define R8A7793_CLK_SSP1 9 #define R8A7793_CLK_TMU1 11 #define R8A7793_CLK_3DG 12 #define R8A7793_CLK_2DDMAC 15 #define R8A7793_CLK_FDP1_1 18 #define R8A7793_CLK_FDP1_0 19 #define R8A7793_CLK_TMU3 21 #define R8A7793_CLK_TMU2 22 #define R8A7793_CLK_CMT0 24 #define R8A7793_CLK_TMU0 25 #define R8A7793_CLK_VSP1_DU1 27 #define R8A7793_CLK_VSP1_DU0 28 #define R8A7793_CLK_VSP1_S 31 /* MSTP2 */ #define R8A7793_CLK_SCIFA2 2 #define R8A7793_CLK_SCIFA1 3 #define R8A7793_CLK_SCIFA0 4 #define R8A7793_CLK_MSIOF2 5 #define R8A7793_CLK_SCIFB0 6 #define R8A7793_CLK_SCIFB1 7 #define R8A7793_CLK_MSIOF1 8 #define R8A7793_CLK_SCIFB2 16 #define R8A7793_CLK_SYS_DMAC1 18 #define R8A7793_CLK_SYS_DMAC0 19 /* MSTP3 */ #define R8A7793_CLK_TPU0 4 #define R8A7793_CLK_SDHI2 11 #define R8A7793_CLK_SDHI1 12 #define R8A7793_CLK_SDHI0 14 #define R8A7793_CLK_MMCIF0 15 #define R8A7793_CLK_IIC0 18 #define R8A7793_CLK_PCIEC 19 #define R8A7793_CLK_IIC1 23 #define R8A7793_CLK_SSUSB 28 #define R8A7793_CLK_CMT1 29 #define R8A7793_CLK_USBDMAC0 30 #define R8A7793_CLK_USBDMAC1 31 /* MSTP4 */ #define R8A7793_CLK_IRQC 7 /* MSTP5 */ #define R8A7793_CLK_AUDIO_DMAC1 1 #define R8A7793_CLK_AUDIO_DMAC0 2 #define R8A7793_CLK_ADSP_MOD 6 #define R8A7793_CLK_THERMAL 22 #define R8A7793_CLK_PWM 23 /* MSTP7 */ #define R8A7793_CLK_EHCI 3 #define R8A7793_CLK_HSUSB 4 #define R8A7793_CLK_HSCIF2 13 #define R8A7793_CLK_SCIF5 14 #define R8A7793_CLK_SCIF4 15 #define R8A7793_CLK_HSCIF1 16 #define R8A7793_CLK_HSCIF0 17 #define R8A7793_CLK_SCIF3 18 #define R8A7793_CLK_SCIF2 19 #define R8A7793_CLK_SCIF1 20 #define R8A7793_CLK_SCIF0 21 #define R8A7793_CLK_DU1 23 #define R8A7793_CLK_DU0 24 #define R8A7793_CLK_LVDS0 26 /* MSTP8 */ #define R8A7793_CLK_IPMMU_SGX 0 #define R8A7793_CLK_VIN2 9 #define R8A7793_CLK_VIN1 10 #define R8A7793_CLK_VIN0 11 #define R8A7793_CLK_ETHER 13 #define R8A7793_CLK_SATA1 14 #define R8A7793_CLK_SATA0 15 /* MSTP9 */ #define R8A7793_CLK_GPIO7 4 #define R8A7793_CLK_GPIO6 5 #define R8A7793_CLK_GPIO5 7 #define R8A7793_CLK_GPIO4 8 #define R8A7793_CLK_GPIO3 9 #define R8A7793_CLK_GPIO2 10 #define R8A7793_CLK_GPIO1 11 #define R8A7793_CLK_GPIO0 12 #define R8A7793_CLK_RCAN1 15 #define R8A7793_CLK_RCAN0 16 #define R8A7793_CLK_QSPI_MOD 17 #define R8A7793_CLK_I2C5 25 #define R8A7793_CLK_IICDVFS 26 #define R8A7793_CLK_I2C4 27 #define R8A7793_CLK_I2C3 28 #define R8A7793_CLK_I2C2 29 #define R8A7793_CLK_I2C1 30 #define R8A7793_CLK_I2C0 31 /* MSTP10 */ #define R8A7793_CLK_SSI_ALL 5 #define R8A7793_CLK_SSI9 6 #define R8A7793_CLK_SSI8 7 #define R8A7793_CLK_SSI7 8 #define R8A7793_CLK_SSI6 9 #define R8A7793_CLK_SSI5 10 #define R8A7793_CLK_SSI4 11 #define R8A7793_CLK_SSI3 12 #define R8A7793_CLK_SSI2 13 #define R8A7793_CLK_SSI1 14 #define R8A7793_CLK_SSI0 15 #define R8A7793_CLK_SCU_ALL 17 #define R8A7793_CLK_SCU_DVC1 18 #define R8A7793_CLK_SCU_DVC0 19 #define R8A7793_CLK_SCU_CTU1_MIX1 20 #define R8A7793_CLK_SCU_CTU0_MIX0 21 #define R8A7793_CLK_SCU_SRC9 22 #define R8A7793_CLK_SCU_SRC8 23 #define R8A7793_CLK_SCU_SRC7 24 #define R8A7793_CLK_SCU_SRC6 25 #define R8A7793_CLK_SCU_SRC5 26 #define R8A7793_CLK_SCU_SRC4 27 #define R8A7793_CLK_SCU_SRC3 28 #define R8A7793_CLK_SCU_SRC2 29 #define R8A7793_CLK_SCU_SRC1 30 #define R8A7793_CLK_SCU_SRC0 31 /* MSTP11 */ #define R8A7793_CLK_SCIFA3 6 #define R8A7793_CLK_SCIFA4 7 #define R8A7793_CLK_SCIFA5 8 #endif /* __DT_BINDINGS_CLOCK_R8A7793_H__ */ 2a69c226435e2c3fd316b592 (patch) tree9582a827ce818aba63b5bb5f0f7a3d1e9f992cf9 /net parent63dfef75ed75364901d7caa52c6420cec3e73519 (diff)parent83a718d6294964fd1b227fa5f1ad001bc1fe7656 (diff)
Merge branch 'bridge-improve-cache-utilization'
Nikolay Aleksandrov says: ==================== bridge: improve cache utilization This is the first set which begins to deal with the bad bridge cache access patterns. The first patch rearranges the bridge and port structs a little so the frequently (and closely) accessed members are in the same cache line. The second patch then moves the garbage collection to a workqueue trying to improve system responsiveness under load (many fdbs) and more importantly removes the need to check if the matched entry is expired in __br_fdb_get which was a major source of false-sharing. The third patch is a preparation for the final one which If properly configured, i.e. ports bound to CPUs (thus updating "updated" locally) then the bridge's HitM goes from 100% to 0%, but even without binding we get a win because previously every lookup that iterated over the hash chain caused false-sharing due to the first cache line being used for both mac/vid and used/updated fields. Some results from tests I've run: (note that these were run in good conditions for the baseline, everything ran on a single NUMA node and there were only 3 fdbs) 1. baseline 100% Load HitM on the fdbs (between everyone who has done lookups and hit one of the 3 hash chains of the communicating src/dst fdbs) Overall 5.06% Load HitM for the bridge, first place in the list 2. patched & ports bound to CPUs 0% Local load HitM, bridge is not even in the c2c report list Also there's 3% consistent improvement in netperf tests. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net')
-rw-r--r--net/bridge/br_device.c1
-rw-r--r--net/bridge/br_fdb.c34
-rw-r--r--net/bridge/br_if.c2
-rw-r--r--net/bridge/br_input.c3
-rw-r--r--net/bridge/br_ioctl.c2
-rw-r--r--net/bridge/br_netlink.c2
-rw-r--r--net/bridge/br_private.h57
-rw-r--r--net/bridge/br_stp.c2
-rw-r--r--net/bridge/br_stp_if.c4
-rw-r--r--net/bridge/br_stp_timer.c2
-rw-r--r--net/bridge/br_sysfs_br.c2
11 files changed, 59 insertions, 52 deletions
diff --git a/net/bridge/br_device.c b/net/bridge/br_device.c